HMP8156 View Datasheet(PDF) - Intersil
Part Name
Description
Manufacturer
HMP8156 Datasheet PDF : 33 Pages
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HMP8156
BIT
NUMBER
FUNCTION
7-0
Line 284 Caption
Data
(Second Byte)
TABLE 21. CLOSED CAPTION_284B DATA REGISTER
SUB ADDRESS = 13H
DESCRIPTION
This register is cascaded with the closed caption_284A data register and they are read
out serially as 16 bits during line 281, 284, or 335 if line 284 captioning is enabled. Bit
D0 of the 284A data register is shifted out first.
RESET
STATE
80H
BIT
NUMBER
FUNCTION
7-0
Assert BLANK
Output Signal
(Horizontal)
TABLE 22. START H_BLANK LOW REGISTER
SUB ADDRESS = 20H
DESCRIPTION
This 8-bit register is cascaded with Start H_Blank High Register to form a 10-bit
start_horizontal_blank register. It specifies the horizontal count (in 1x clock cycles) at
which to start ignoring pixel data each scan line. The leading edge of HSYNC is count
020H. This register is ignored unless BLANK is configured as an output.
RESET
STATE
4AH
BIT
NUMBER
FUNCTION
7-2
Reserved
1-0
Assert BLANK
Output Signal
(Horizontal)
TABLE 23. START H_BLANK HIGH REGISTER
SUB ADDRESS = 21H
DESCRIPTION
RESET
STATE
This 2-bit register is cascaded with Start H_Blank Low Register to form a 10-bit
start_horizontal_blank register. It specifies the horizontal count (in 1x clock cycles) at
which to start ignoring pixel data each scan line. The leading edge of HSYNC is count
020H. This register is ignored unless BLANK is configured as an output.
000000B
11B
BIT
NUMBER
FUNCTION
7-0
Negate BLANK
Output Signal
(Horizontal)
TABLE 24. END H_BLANK REGISTER
SUB ADDRESS = 22H
DESCRIPTION
This 8-bit register specifies the horizontal count (in 1x clock cycles) at which to start
inputting pixel data each scan line. The leading edge of HSYNC is count 000H. This reg-
ister is ignored unless BLANK is configured as an output.
RESET
STATE
7AH
20
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