Pipeline—Compare/Fill Write Cycle Timing
GS841E18AT/B-166/150/130/100
CLK
CE(1)
W(2)
OE
A0-A17
DQ1-16
DQP1-2
DE
MOE
MATCH
tS
tH
A
A
tKM
tMLZ
tMOE
Hit
B
B
B
tKM
tKMX
tKM
Match high when chip deselected
Miss
Fill Write
Notes:
1. CE = L is defined as CE1=L, CE2=H and CE3=L
2. W = L is the Asertive function of GW, BWE, BW1, BW2. See Byte Write Function table for detail.
Rev: 1.00 10/2001
20/29
© 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.