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CXD2424R View Datasheet(PDF) - Sony Semiconductor

Part Name
Description
Manufacturer
CXD2424R Datasheet PDF : 31 Pages
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CXD2424R
3-2. Serial input
For serial input (PS = High), SMD1 and SMD2 bits within ED2 (DATA) take priority over SMD1 (Pin 7) and
SMD2 (Pin 9) pins as SMD1 and SMD2 (shutter mode control). In this case, control by SMD1 and SMD2 pins
is invalid.
ED1 (CLK)
ED2 (DATA)
D0 D1 D2 D3 D4 D5 D6 D7 D8 SMD1 SMD2 Dummy
ED0 (STB)
ED2 data is latched to the register at the rise of ED1, and transferred to the within at the rise of ED0.
AC Characteristics
ED2
ED1
ED0
ts2
th2
tw1
ts1
ts0
tw0
Symbol
ts2
th2
ts1
tw0
ts0
tw1
Definition
ED2 set-up time, activated by the falling edge of ED1
ED2 hold time, activated by the rising edge of ED1
ED1 rising set-up time, activated by the rising edge of ED0
ED0 pulse width
ED0 rising set-up time, activated by the rising edge of ED1
ED1 pulse width (serial input)
Min.
20ns
20ns
20ns
20ns
20ns
20ns
Max.
50µs
– 13 –

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