ATTINY43U-MUR View Datasheet(PDF) - Atmel Corporation

Part Name

Description

Manufacturer

ATTINY43U-MUR

8-bit Microcontroller with 4K Bytes In-System Programmable Flash and Boost Converter

Atmel Corporation 

5.4 I/O Memory

The I/O space definition of the ATtiny43U is shown in “Register Summary” on page 195.

All I/Os and peripherals are placed in the I/O space. All I/O locations may be accessed by the

LD/LDS/LDD and ST/STS/STD instructions, transferring data between the 32 general purpose

working registers and the I/O space. I/O Registers within the address range 0x00 - 0x1F are

directly bit-accessible using the SBI and CBI instructions. In these registers, the value of single

bits can be checked by using the SBIS and SBIC instructions. See the instruction set section for

more details. When using the I/O specific commands IN and OUT, the I/O addresses 0x00 -

0x3F must be used. When addressing I/O Registers as data space using LD and ST instruc-

tions, 0x20 must be added to these addresses.

For compatibility with future devices, reserved bits should be written to zero if accessed.

Reserved I/O memory addresses should never be written.

Some of the Status Flags are cleared by writing a logical one to them. Note that, unlike most

other AVRs, the CBI and SBI instructions will only operate on the specified bit, and can therefore

be used on registers containing such Status Flags. The CBI and SBI instructions work with reg-

isters 0x00 to 0x1F only.

The I/O and Peripherals Control Registers are explained in later sections.

5.4.1

General Purpose I/O Registers

ATtiny43U contains three General Purpose I/O Registers. These registers can be used for stor-

ing any information, and they are particularly useful for storing global variables and status flags.

General Purpose I/O Registers within the address range 0x00 - 0x1F are directly bit-accessible

using the SBI, CBI, SBIS, and SBIC instructions.

5.5 Register Description

5.5.1

EEAR – EEPROM Address Register

Bit

7

6

0x1E (0x3E)

–

–

Read/Write

R

R

Initial Value

0

0

5

EEAR5

R/W

X

4

EEAR4

R/W

X

3

EEAR3

R/W

X

2

EEAR2

R/W

X

1

EEAR1

R/W

X

0

EEAR0

R/W

X

EEAR

• Bits 7:6 – Res: Reserved Bits

These bits are reserved and will always read zero.

• Bits 5:0 – EEAR[5:0]: EEPROM Address

The EEPROM Address Register – EEAR – specifies the EEPROM address. The EEPROM data

bytes are addressed linearly in the range 0...(64-1). The initial value of EEAR is undefined. A

proper value must be written before the EEPROM may be accessed.

20 ATtiny43U

8048C–AVR–02/12

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