IT8502G View Datasheet(PDF) - ITE Tech. INC.

Part Name

Description

Manufacturer

IT8502G

Embedded Controller

ITE Tech. INC. 

IT8502E/F/G

6.6.5.3 PM Data Out Port with SCI (PMDOSCI) ............................................................. 121

6.6.5.4 PM Data Out Port with SMI (PMDOSMI) ............................................................ 121

6.6.5.5 PM Data In Port (PMDI) ..................................................................................... 122

6.6.5.6 PM Data In Port with SCI (PMDISCI) ................................................................. 122

6.6.5.7 PM Control (PMCTL) ......................................................................................... 123

6.6.5.8 PM Interrupt Control (PMIC) .............................................................................. 124

6.6.5.9 PM Interrupt Enable (PMIE) ............................................................................... 124

6.6.5.10 Mailbox Control (MBXCTRL).............................................................................. 125

6.6.5.11 PMC3 Status Register (PM3STS) ...................................................................... 125

6.6.5.12 PMC3 Data Out Port (PM3DO) .......................................................................... 125

6.6.5.13 PMC3 Data In Port (PM3DI)............................................................................... 126

6.6.5.14 PMC3 Control (PM3CTL) ................................................................................... 126

6.6.5.15 PMC3 Interrupt Control (PM3IC) ........................................................................ 126

6.6.5.16 PMC3 Interrupt Enable (PM3IE)......................................................................... 126

6.6.5.17 16-byte PMC2EX Mailbox 0-15 (MBXEC0-15) ................................................... 126

6.7 BRAM in Host Domain ............................................................................................................... 127

6.7.1 Overview ....................................................................................................................... 127

6.8 Serial Peripheral Interface (SSPI) in Host Domain ...................................................................... 128

6.8.1 Overview ....................................................................................................................... 128

6.9 Serial Port 1 (UART1) in Host Domain ....................................................................................... 129

6.9.1 Overview ....................................................................................................................... 129

7. EC Domain Functions........................................................................................................................... 131

7.1 8032 Embedded Controller (EC) ................................................................................................ 131

7.1.1 Overview ....................................................................................................................... 131

7.1.2 Features ........................................................................................................................ 131

7.1.3 General Description ....................................................................................................... 131

7.1.4 Functional Description .................................................................................................. 131

7.1.5 Memory Organization..................................................................................................... 132

7.1.6 On-Chip Peripherals ...................................................................................................... 133

7.1.7 Timer / Counter.............................................................................................................. 135

Up/Down Counter Operation ...................................................................................................... 138

7.1.8 Idle and Doze/Sleep Mode ............................................................................................. 144

7.1.9 EC Internal Register Description .................................................................................... 144

7.1.9.1 Port 0 Register (P0R) ........................................................................................ 145

7.1.9.2 Stack Pointer Register (SPR)............................................................................. 145

7.1.9.3 Data Pointer Low Register (DPLR)..................................................................... 145

7.1.9.4 Data Pointer High Register (DPHR) ................................................................... 145

7.1.9.5 Data Pointer 1 Low Register (DP1LR)................................................................ 146

7.1.9.6 Data Pointer 1 High Register (DP1HR) .............................................................. 146

7.1.9.7 Data Pointer Select Register (DPSR) ................................................................. 146

7.1.9.8 Power Control Register (PCON) ........................................................................ 146

7.1.9.9 Timer Control Register (TCON).......................................................................... 147

7.1.9.10 Timer Mode Register (TMOD)............................................................................ 148

7.1.9.11 Timer 0 Low Byte Register (TL0R) ..................................................................... 148

7.1.9.12 Timer 1 Low Byte Register (TL1R) ..................................................................... 148

7.1.9.13 Timer 0 High Byte Register (TH0R).................................................................... 148

7.1.9.14 Timer 1 Low Byte Register (TH1R) .................................................................... 149

7.1.9.15 Clock Control Register (CKCON) ....................................................................... 149

7.1.9.16 Port 1 Register (P1R) ........................................................................................ 149

7.1.9.17 Serial Port Control Register (SCON) .................................................................. 150

7.1.9.18 Serial Port Buffer Register (SBUFR) .................................................................. 150

7.1.9.19 Port 2 Register (P2R) ........................................................................................ 150

7.1.9.20 Interrupt Enable Register (IE)............................................................................. 151

7.1.9.21 Port 3 Register (P3R) ........................................................................................ 151

7.1.9.22 Interrupt Priority Register (IP)............................................................................. 151

7.1.9.23 Status Register (STATUS) ................................................................................ 152

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IT8502E/F/G V0.7.7

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