Freescale Semiconductor, Inc.
Signal/Connection Descriptions
Serial Host Interface
Table 1-10 Serial Host Interface Signals (Continued)
Signal Name Signal Type
State
during
Reset
Signal Description
HREQ
Input or
Output
Tri-stated
Host Request—This signal is an active low
Schmitt-trigger input when configured for the
master mode but an active low output when
configured for the slave mode.
When configured for the slave mode, HREQ is
asserted to indicate that the SHI is ready for the
next data word transfer and deasserted at the first
clock pulse of the new data word transfer. When
configured for the master mode, HREQ is an input.
When asserted by the external slave device, it will
trigger the start of the data word transfer by the
master. After finishing the data word transfer, the
master will await the next assertion of HREQ to
proceed to the next transfer.
This signal is tri-stated during hardware, software,
personal reset, or when the HREQ1–HREQ0 bits in
the HCSR are cleared. There is no need for
external pull-up in this state.
This input is 5 V tolerant.
MOTOROLA
DSP56362 Advance Information
For More Information On This Product,
Go to: www.freescale.com
1-21