SAF-C167CR-16RM View Datasheet(PDF) - Siemens AG
Part Name
Description
Manufacturer
SAF-C167CR-16RM Datasheet PDF : 67 Pages
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20Dec96@09:25h Intermediate Version
C167CR-16RM
Memory Organization
The memory space of the C167CR-16RM is configured in a Von Neumann architecture which
means that code memory, data memory, registers and I/O ports are organized within the same
linear address space which includes 16 MBytes. The entire memory space can be accessed
bytewise or wordwise. Particular portions of the on-chip memory have additionally been made
directly bitaddressable.
The C167CR-16RM contains 128 KBytes of on-chip mask-programmable ROM for code or
constant data. The lower 32 KBytes of the on-chip ROM can be mapped either to segment 0 or
segment 1.
2 KBytes of on-chip Internal RAM are provided as a storage for user defined variables, for the
system stack, general purpose register banks and even for code. A register bank can consist of up
to 16 wordwide (R0 to R15) and/or bytewide (RL0, RH0, …, RL7, RH7) so-called General Purpose
Registers (GPRs).
1024 bytes (2 * 512 bytes) of the address space are reserved for the Special Function Register
areas (SFR space and ESFR space). SFRs are wordwide registers which are used for controlling
and monitoring functions of the different on-chip units. Unused SFR addresses are reserved for
future members of the C16x family.
2 KBytes of on-chip Extension RAM (XRAM) are provided to store user data, user stacks or code.
The XRAM is accessed like external memory and therefore cannot be used for the system stack or
for register banks and is not bitadressable. The XRAM allows 16-bit accesses with maximum speed.
In order to meet the needs of designs where more memory is required than is provided on chip, up
to 16 MBytes of external RAM and/or ROM can be connected to the microcontroller.
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Semiconductor Group
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