ADVANCE
512Mb: x4, x8, x16
DDR SDRAM
T0
CK#
T1
T2 T2n T3 T3n T4
T5
CK
COMMAND
READ
NOP
NOP
NOP
NOP
NOP
ADDRESS
DQS
Bank a,
Col n
CL = 2
DQ
DO
n
T0
T1
T2 T2n T3 T3n T4
T5
CK#
CK
COMMAND
READ
NOP
NOP
NOP
NOP
NOP
ADDRESS
Bank a,
Col n
CL = 2.5
DQS
DQ
DO
n
NOTE: 1. DO n = data-out from column n.
DON’T CARE
TRANSITIONING DATA
2. Burst length = 4.
3. Three subsequent elements of data-out appear in the programmed order following DO n.
4. Shown with nominal tAC, tDQSCK, and tDQSQ.
Figure 7
READ Burst
512Mb: x4, x8, x16 DDR SDRAM
512Mx4x8x16DDR_B.p65 – Rev. B; Pub 4/01
18
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©2001, Micron Technology, Inc.