F81865F View Datasheet(PDF) - Feature Integration Technology Inc.

Part Name

Description

Manufacturer

F81865F

Super IO with 6 UARTs

Feature Integration Technology Inc. 

7. Function Description

F81865

7.1. Power on Strapping Option

The F81865 provides six pins for power on hardware strapping to select required functions. See

below table for the detail:

Pin No.

4

123

7

124

126

5

Symbol

FWH_TRAP

PWM_Duty

SPI_TRAP

I2C_ADDR

Config4E_2E

PWM_DC

7.2. FDC

Value

1

0

1

0

1

0

1

0

1

0

1

0

Description

FWH as a primary BIOS

SPI as a primary BIOS

Power on fan speed default duty is 60%. ( Default)

Power on fan speed default duty is 100%.

SPI function disable(Default)

SPI function enable

The I2C slave address is 8’h5C (Default)

The I2C slave address is 8’h5A

Configuration Register I/O port is 4E/4F. (Default)

Configuration Register I/O port is 2E/2F.

Fan control mode: PWM mode. ( Default)

Fan control mode: DAC mode.

The Floppy Disk Controller provides the interface between a host processor and one floppy disk

drive. It integrates a controller and a digital data separator with write pre-compensation, data rate

selection logic, microprocessor interface, and a set of registers. The FDC supports data transfer rates

of 250 Kbps, 300 Kbps, 500 Kbps, 1 Mbps and 2 Mbps. It operates in PC/AT mode.

The FDC configuration is handled by software and a set of Configuration registers. Status, Data,

and Control registers facilitate the interface between the host microprocessor and the disk drive,

providing information about the condition and/or state of the FDC. These configuration registers can

select the data rate, enable interrupts, drives, and DMA modes, and indicate errors in the data or

operation of the FDC/FDD. The controller manages data transfers using a set of data transfer and

control commands. These commands are handled in three phases: Command, Execution, and

Result. Not all commands utilize all these three phases.

The below content is about the FDC device register descriptions. All the registers are for

software porting reference.

Status Register A (PS/2 mode) ⎯ Base + 0

Bit

Name

R/W Default

Description

7

INTPEND

R

0 This bit indicates the state of the interrupt output.

0: a second drive has been installed.

6

DRV2_N

R

-

1: a second drive has not been installed.

20

May, 2010

V0.28P

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