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S5L9290X View Datasheet(PDF) - Samsung

Part Name
Description
Manufacturer
S5L9290X Datasheet PDF : 48 Pages
First Prev 41 42 43 44 45 46 47 48
DIGITAL SIGNAL PROCESSOR FOR CDP
PRELIMINARY
S5L9290X
XPHSP (CLV-A) Mode (Command Register : $99)
In this normal operation mode, the speed mode and phase mode are change alternately by the lock signal. After
the LKFS signal generated by the frame sync block is sampled in WFCK/16 cycles and is detected to be 'H', the
phase mode executes and, if it is detected as 'L' eight consecutive times, the speed mode automatically executes.
LOCK generation
If the LKFS signal remains at 'L' for the frame time, provided by Micom Command $99's UNLOCK[1:0], or for less,
LOCK remains at 'H'. However, if it remains at 'L' for more than the given frame, the LOCK changes to 'L'. The time
in LOCK is the same for 1X and 2X speed.
Additional Functions ($9B's POS must be set to = 'H')
1) SMDS masking
This function prevents sensitive CLV servo response to small frequency error changes.
If the SME of $9A is set to 'H', it operates in the SMDS masking mode (dead zone enable).
The SML[1:0] masking range of $9B is set, and, if $9A's SMM bit is 'H', SML value becomes the absolute value of
the masking range, set by 9D'h SMOFFSET[3:0], but if 'L', then the value is set to the one shown in the table
below. If SMDS frequency error, that is, WFCK high width is within the masking range, the SMDS output is PWM of
50:50 or Hi-Z is output. (Determined by $9A's STRIO)
If SMDS masking occurs, SMDP output is masked automatically and Hi-Z is output.
Command order : $9B(SML) $9D(SMOFFSET) $9A (SME, SMM)
SML[1:0]
00
01
10
11
masking error range (SML = 'L')
0%
± 6.25 %
± 12.5 %
± 25 %
< SML[1:0] setting >
SMDS High width (t)
288t
288t
masking error area
(deas zone area)
Maximum error area
< Dead Zone Area >
WFCK WFCK High width (t)
1t = 1/8.4672MHz
43

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