88E1116R-NNC1 View Datasheet(PDF) - Marvell Semiconductor
Part Name
Description
Manufacturer
88E1116R-NNC1 Datasheet PDF : 16 Pages
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Alaska® 88E1116R Technical Product Brief
Gigabit Ethernet Transceiver
Table 9: Power & Ground
64-QFN
Pin #
21
22
27
29
34
37
Pin Name
AVDD
AVDDC
Pin
Ty p e
Power
Description
Analog supply. 1.8V1. AVDD can be supplied externally with 1.8V, or via the
1.8V regulator.
Analog supply - 1.8V or 2.5V, or 3.3V2.
AVDDC must be supplied externally. Do not use the 1.8V regulator to power
AVDDC.
14
AVDDR
15
1.2V Regulator supply - 1.8V
AVDDR can be supplied externally with 1.8V, or via the 1.8V regulator. If the
1.2V regulator is not used, AVDDR must still be tied to 1.8V.
16
AVDDX
Power 1.8V Regulator supply - 2.5V, 3.3V, (or 1.8V).
AVDDX must be supplied externally. Note that this supply must be the same
voltage as AVDDC.
If the 1.8V regulator is not used, then it means a 1.8V supply is in the sys-
tem. AVDDX (along with AVDDC) would be tied to 1.8V in this case.
5
DVDD
Power Digital core supply - 1.2V.
13
DVDD can be supplied externally with 1.2V, or via the 1.2V regulator.
40
47
7
VDDO
Power 1.8V, 2.5V, or 3.3V non-RGMII digital I/O supply3.
46
VDDO must be supplied externally. Do not use the 1.8V regulator to power
VDDO.
52
VDDOR
Power 1.8V, 2.5V, or 3.3V RGMII digital I/O supply4.
56
VDDOR must be supplied externally. Do not use the 1.8V regulator to power
VDDOR.
EPAD
VSS
GND
Ground to device. The 64-pin QFN package has an exposed die pad (E-
PAD) at its base. This E-PAD must be soldered to VSS.
Refer to the package mechanical drawings for the exact location and dimen-
sions of the EPAD.
18
NC
285
NC
No connect. These pins are not connected to the die so they can be con-
nected to anything on the board.
1. AVDD supplies the MDIP/N[3:0] pins.
2. AVDDC supplies the XTAL_IN and XTAL_OUT pins.
3. VDDO supplies the MDC, MDIO, RESETn, LED[2:0], CONFIG[3:0], TDI, TMS, TCK, TRSTn, TDO, DIS_REG12,
CTRL18, HSDAC, and TSTPT
4. VDDOR supplies the TXD[3:0], TX_CLK, TX_CTRL, RXD[3:0], RX_CLK, and RX_CTRL pins.
5. Pin 28 must be connected to AVDD in Revision A0. Refer to the Rev A0 Release Notes for Pin 28 connection
details.
Doc. No. MV-S105539-00, Rev. --
Page 12
Document Classification: Proprietary Information
Copyright © 2011 Marvell
May 9, 2011, Advance
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