AD9845B(RevA) View Datasheet(PDF) - Analog Devices
Part Name
Description
Manufacturer
AD9845B Datasheet PDF : 24 Pages
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AD9845B
D10 D9
D8
X
X
X
Table IV. Clamp Level Register Contents (Default Value x080)
MSB
LSB
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
1
0
∑
∑
∑
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
Clamp Level (LSB)
0
1
2
∑
∑
∑
254
255
Table V. Control Register Contents (Default Value x000)
Data Out
D10 D9
DATACLK
D8 D7 D6
CLP/PBLK SHP/SHD
D5
D4
PxGA
D32
Color Steering Modes
D2 D1 D0
X 0 Enable
01 01 0 Rising Edge Trigger 0 Active Low 0 Active Low 0 Disable 0 0 0 Steering Disabled
1 Three-State
1 Falling Edge Trigger 1 Active High 1 Active High 1 Enable 0 0 1 Mosaic Separate
0 1 0 Interlace
0 1 1 3-Color
1 0 0 4-Color
1 0 1 VD Selected
1 1 0 Mosaic Repeat
1 1 1 User Specified
NOTES
1 Must be set to 0.
2 When D3 = 0 (PxGA disabled), the PxGA gain is fixed to Code 63 (3.3 dB).
Table VI. PxGA Gain Registers for Gain0, Gain1, Gain2, Gain3 (Default Value x000)
MSB
LSB
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
X
X
X
X
X
0
1
1
1
1
1
∑
∑
∑
0
0
0
0
0
0
1
1
1
1
1
1
∑
∑
∑
1
0
0
0
0
0
*Control Register Bit D3 must be set high (PxGA Enable) to use the PxGA Gain Registers.
Gain (dB)*
+9.5
∑
∑
∑
+3.5
+3.3
∑
∑
∑
–2.5
–16–
REV. A
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