ADF7025BCPZ-RL View Datasheet(PDF) - Analog Devices

Part Name

Description

Manufacturer

ADF7025BCPZ-RL

High Performance ISM Band Transceiver IC

Analog Devices 

VCO Bias Current

VCO bias current can be adjusted using Bit R1_DB19 to

Bit R1_DB16. To ensure VCO oscillation under all conditions,

the minimum bias current setting is Setting 12 (0xC).

431 MHz to 464 MHz Operation

For operation in the 431 MHz to 464 MHz band, the frequency

divide-by-2 has to be enabled. It is enabled by R1_DB13. Because

this divide is external to the synthesizer loop, the feedback

divider number (N + F) should be programmed to a value twice

the desired RF output frequency.

VCO BIAS

R1_DB (16:19)

LOOP FILTER

VCO

÷2

220µF

CVCO PIN

TO PA AND

N DIVIDER

MUX

÷2

VCO SELECT BIT

Figure 24. Voltage Controlled Oscillator

ADF7025

CHOOSING CHANNELS FOR BEST SYSTEM

PERFORMANCE

The Fractional-N PLL allows the selection of any channel

within 862 MHz to 928 MHz (and 431 MHz to 464 MHz using

divide-by-2) to a resolution of <300 Hz. This also facilitates

frequency-hopping systems.

Careful selection of the RF transmit channels must be made to

achieve best spurious performance. The architecture of

Fractional-N results in some level of the nearest integer channel

moving through the loop to the RF output. These beat-note

spurs are not attenuated by the loop, if the desired RF channel

and the nearest integer channel are separated by a frequency of

less than the LBW.

The occurrence of beat-note spurs is rare, because the integer

frequencies are at multiples of the reference, which is typically

>10 MHz.

Beat-note spurs can be significantly reduced in amplitude by

avoiding very small or very large values in the fractional

register, using the frequency doubler. By having a channel

1 MHz away from an integer frequency, a 100 kHz loop filter

can reduce the level to less than −45 dBc.

Rev. A | Page 17 of 44

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