ADM1025 View Datasheet(PDF) - ON Semiconductor

Part Name

Description

Manufacturer

ADM1025

Low Cost PC Hardware Monitor ASIC

ON Semiconductor 

Preliminary Technical Data

USING THE ADM1025/ADM1025A

POWER-ON RESET

When power is first applied, the ADM1025/ADM1025A

performs a “power- on reset” on several of its registers.

Registers whose power-on values are not shown have power-on

conditions that are indeterminate. Value and limit registers are

reset to 00h on power-up. The ADC is inactive. In most

applications, usually the first action after power-on would be to

write limits into the Limit Registers.

Power-on reset clears or initializes the following registers (the

initialized values are shown in Table 9):

– Configuration Register

– Status Registers #1 and #2

– VID0-3 Register

– VID4 Register

– Test Register

INITIALIZATION

Configuration Register Initialization performs a similar, but not

identical, function to power-on reset.

Configuration Register Initialization is accomplished by setting

Bit 7 of the Configuration Register high. This bit automatically

clears after being set.

USING THE CONFIGURATION REGISTER

Control of the ADM1025/ADM1025A is provided through the

configuration register. The Configuration Register is used to

start and stop the ADM1025/ADM1025A, program the

operating modes of Pins 11 and 16, and provide the

initialization function described above.

Bit 0 of the Configuration Register controls the monitoring loop

of the ADM1025/ADM1025A. Setting Bit 0 low stops the

monitoring loop and puts the ADM1025/ADM1025A into a

low power mode thereby reducing power consumption. Serial

bus communication is still possible with any register in the

ADM1025/ADM1025A while in low power mode. Setting Bit 0

high starts the monitoring loop.

Bit 4 of the Configuration Register causes a low going 20 ms

(typ) pulse at the RST pin (Pin 16) when set. This bit is self-

clearing.

Bit 5 of the Configuration Register selects the operating mode

of Pin 11 between the default of 12 V analog input (Bit 5 = 0)

and VID4 (Bit 5 = 1).

ADM1025/ADM1025A

Bit 7 of the Configuration Register is used to start a

Configuration Register Initialization when it is set to 1.

USING THE OFFSET REGISTER

This register contains a twos complement value that is added

(or subtracted if the number is negative) to either the internal

or external temperature reading. Note that the default value in

the offset register is zero, so zero is always added to the

temperature reading. The offset register is configured for the

external temperature channel by default. It may be switched to

the internal channel by setting Bit 0 of the Test Register to 1,

setting Bit 6 of the VID Register to 1, and clearing Bit 7 of the

VID Register.

STARTING CONVERSION

The monitoring function of the ADM1025/ADM1025A is

started by writing to the Configuration Register and setting

Start (Bit 0) high. Limit values should be written into the Limit

Registers before starting the ADC to avoid spurious out-of-limit

conditions. The time taken to complete the analog

measurements depends on how they are configured, as

described elsewhere. Once the measurements have been

completed, the results can be read from the Value Registers at

any time.

REDUCED POWER AND SHUTDOWN MODE

The ADM1025/ADM1025A can be placed in a low power mode

by setting Bit 0 of the Configuration Register to 0. This disables

the internal ADC. Full shutdown mode may then be achieved

by setting Bit 7 of the VID Register to 1 and Bit 0 of the Test

Register to 1. This turns off power to all analog circuits and

stops the monitoring cycle, if running, but it does not affect the

condition of any of the registers. The device will return to its

previous state when these bits are reset to zero.

5 V OPERATION

The ADM1025/ADM1025A may be operated with VCC

connected to any supply voltage between 3.0 V and 5.5 V, but it

should be noted that the device has been optimized for 3.3 V

operation. In particular, the internal voltage divider used to

measure the supply voltage is optimized for 3.3 V. Powering the

device from 5 V will cause the VCC Reading Register (Register

25h) to overrange. In this case, the 5 V measurement should be

read from the 5 V Reading Register (Register 23h), instead of

the VCC Reading Register. Note also that when the 12 VIN/VID4

pin is programmed to read VID4, due to its internal voltage

divider, it will only read VIH = 2.1 V on the 12 VIN/VID4 pin as

logic high if the device is being powered from the 3.3 V supply.

Rev. P5 | Page 17 of 21| www.onsemi.com

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