ADM1025 View Datasheet(PDF) - ON Semiconductor

Part Name

Description

Manufacturer

ADM1025

Low Cost PC Hardware Monitor ASIC

ON Semiconductor 

Preliminary Technical Data

Table 11. Register 41h – Status Register 1 (Power-On Default

<7:0> = 00h)

Bit Name

R/W

Description

0 +2.5 V_Error Read-

Only

A 1 indicates a high or low limit

has been exceeded.

1 VCCP_Error

Read-

Only

A 1 indicates a high or low limit

has been exceeded.

2 +3.3 V_Error Read-

Only

A 1 indicates a high or low limit

has been exceeded.

3 +5 V_Error Read-

Only

A 1 indicates a high or low limit

has been exceeded.

4 Local Temp Read-

Error

Only

A 1 indicates a high or a low

temperature limit has been

exceeded.

5 Remote

Read-

Temp Error Only

A 1 indicates a high or low

Remote temperature limit has

been exceeded.

6 Reserved

7 Reserved

Table 12. Register 42h – Status Register 2 (Power-On Default

<7:0> = 00h)

Bit Name

R/W

Description

0 +12 V_Error Read-

Only

A 1 indicates a high or low limit

has been exceeded.

1 VCC_Error

Read-

Only

A 1 indicates a high or low limit

has been exceeded.

2 Reserved

Read-

Only

Undefined

3 Reserved

Read-

Only

Undefined

4 Reserved

Read-

Only

Undefined

5 Reserved

Read-

Only

Undefined

6 Remote

Read-

Diode Fault Only

A one indicates either a short or

open circuited fault on the

remote thermal diode inputs.

7 Reserved

Read-

Only

Undefined

ADM1025/ADM1025A

Table 13. Register 47h – VID REGISTER (Power-On Default

= 0000 (VID[3:0]))

Bit Name R/W

Description

0–3 VID[3:0] Read-Only

The VID[3:0] inputs from

Pentium/PRO power

supplies to indicate the

operating voltage (e.g.,

1.3 V to 2.9 V).

4–5 Reserved Read-Only

Undefined

6

Offset

Read/Write

Config

Configures offset register

to be used with internal

or external channel. If Bit

0 of Test Register = 1 and

Bit 7 of VID Register = 0,

then setting this bit to 1

configures tHhe Offset

Register to the internal

temperature channel.

Clearing this bit

configures the Offset

Register to the external

temperature channel.

(Default = 0.)

7

RST

Read/Write

ENABLE

When set to 1, enables

the RST output function

on Pin 16. This bit

defaults to 0 on power-

up. (RST Disabled.)

Table 14. Register 49h – VID4 Register (Power-On Default =

1000 000(VID4))

Bit Name

R/W Description

0

VID4

Read

VID4 Input (If Selected)

(Defaults to 0)

1–7 Reserved

Read

Rev. P5 | Page 19 of 21| www.onsemi.com

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