ATTINY2313-20PI View Datasheet(PDF) - Atmel Corporation
Part Name
Description
Manufacturer
ATTINY2313-20PI
Atmel Corporation
ATTINY2313-20PI Datasheet PDF : 223 Pages
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ATtiny2313/V
Atomic Byte Programming
Split Byte Programming
Erase
Write
• Bit 2 – EEMPE: EEPROM Master Program Enable
The EEMPE bit determines whether writing EEPE to one will have effect or not.
When EEMPE is set, setting EEPE within four clock cycles will program the EEPROM at
the selected address. If EEMPE is zero, setting EEPE will have no effect. When EEMPE
has been written to one by software, hardware clears the bit to zero after four clock
cycles.
• Bit 1 – EEPE: EEPROM Program Enable
The EEPROM Program Enable Signal EEPE is the programming enable signal to the
EEPROM. When EEPE is written, the EEPROM will be programmed according to the
EEPMn bits setting. The EEMPE bit must be written to one before a logical one is writ-
ten to EEPE, otherwise no EEPROM write takes place. When the write access time has
elapsed, the EEPE bit is cleared by hardware. When EEPE has been set, the CPU is
halted for two cycles before the next instruction is executed.
• Bit 0 – EERE: EEPROM Read Enable
The EEPROM Read Enable Signal – EERE – is the read strobe to the EEPROM. When
the correct address is set up in the EEAR Register, the EERE bit must be written to one
to trigger the EEPROM read. The EEPROM read access takes one instruction, and the
requested data is available immediately. When the EEPROM is read, the CPU is halted
for four cycles before the next instruction is executed. The user should poll the EEPE bit
before starting the read operation. If a write operation is in progress, it is neither possible
to read the EEPROM, nor to change the EEAR Register.
Using Atomic Byte Programming is the simplest mode. When writing a byte to the
EEPROM, the user must write the address into the EEAR Register and data into EEDR
Register. If the EEPMn bits are zero, writing EEPE (within four cycles after EEMPE is
written) will trigger the erase/write operation. Both the erase and write cycle are done in
one operation and the total programming time is given in Table 1. The EEPE bit remains
set until the erase and write operations are completed. While the device is busy with
programming, it is not possible to do any other EEPROM operations.
It is possible to split the erase and write cycle in two different operations. This may be
useful if the system requires short access time for some limited period of time (typically
if the power supply voltage falls). In order to take advantage of this method, it is required
that the locations to be written have been erased before the write operation. But since
the erase and write operations are split, it is possible to do the erase operations when
the system allows doing time-consuming operations (typically after Power-up).
To erase a byte, the address must be written to EEAR. If the EEPMn bits are 0b01, writ-
ing the EEPE (within four cycles after EEMPE is written) will trigger the erase operation
only (programming time is given in Table 1). The EEPE bit remains set until the erase
operation completes. While the device is busy programming, it is not possible to do any
other EEPROM operations.
To write a location, the user must write the address into EEAR and the data into EEDR.
If the EEPMn bits are 0b10, writing the EEPE (within four cycles after EEMPE is written)
will trigger the write operation only (programming time is given in Table 1). The EEPE bit
remains set until the write operation completes. If the location to be written has not been
erased before write, the data that is stored must be considered as lost. While the device
is busy with programming, it is not possible to do any other EEPROM operations.
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2543F–AVR–08/04
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