ATTINY2313-20PI View Datasheet(PDF) - Atmel Corporation

Part Name

Description

Manufacturer

ATTINY2313-20PI

8-bit AVR® Microcontroller with 2K Bytes In-System Programmable Flash

Atmel Corporation 

ATtiny2313/V

System Clock and

Clock Options

Clock Systems and their

Distribution

Figure 11 presents the principal clock systems in the AVR and their distribution. All of

the clocks need not be active at a given time. In order to reduce power consumption, the

clocks to modules not being used can be halted by using different sleep modes, as

described in “Power Management and Sleep Modes” on page 29. The clock systems

are detailed below.

Figure 11. Clock Distribution

General I/O

Modules

CPU Core

RAM

Flash and

EEPROM

CPU Clock – clkCPU

I/O Clock – clkI/O

Flash Clock – clkFLASH

clkI/O

AVR Clock

Control Unit

clkCPU

clkFLASH

Reset Logic

Watchdog Timer

Source clock

Clock

Multiplexer

Watchdog clock

Watchdog

Oscillator

External Clock

Crystal

Oscillator

Calibrated RC

Oscillator

The CPU clock is routed to parts of the system concerned with operation of the AVR

core. Examples of such modules are the General Purpose Register File, the Status Reg-

ister and the data memory holding the Stack Pointer. Halting the CPU clock inhibits the

core from performing general operations and calculations.

The I/O clock is used by the majority of the I/O modules, like Timer/Counters, and

USART. The I/O clock is also used by the External Interrupt module, but note that some

external interrupts are detected by asynchronous logic, allowing such interrupts to be

detected even if the I/O clock is halted. Also note that start condition detection in the USI

module is carried out asynchronously when clkI/O is halted, enabling USI start condition

detection in all sleep modes.

The Flash clock controls operation of the Flash interface. The Flash clock is usually

active simultaneously with the CPU clock.

21

2543F–AVR–08/04

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