ATTINY2313-20PI View Datasheet(PDF) - Atmel Corporation

Part Name

Description

Manufacturer

ATTINY2313-20PI

8-bit AVR® Microcontroller with 2K Bytes In-System Programmable Flash

Atmel Corporation 

ATtiny2313/V

Brown-out Detector

Internal Voltage Reference

Watchdog Timer

Port Pins

If the Brown-out Detector is not needed by the application, this module should be turned

off. If the Brown-out Detector is enabled by the BODLEVEL Fuses, it will be enabled in

all sleep modes, and hence, always consume power. In the deeper sleep modes, this

will contribute significantly to the total current consumption. Refer to “Brown-out Detec-

tion” on page 34 for details on how to configure the Brown-out Detector.

The Internal Voltage Reference will be enabled when needed by the Brown-out Detec-

tion or the Analog Comparator. If these modules are disabled as described in the

sections above, the internal voltage reference will be disabled and it will not be consum-

ing power. When turned on again, the user must allow the reference to start up before

the output is used. If the reference is kept on in sleep mode, the output can be used

immediately. Refer to “Internal Voltage Reference” on page 37 for details on the start-up

time.

If the Watchdog Timer is not needed in the application, the module should be turned off.

If the Watchdog Timer is enabled, it will be enabled in all sleep modes, and hence,

always consume power. In the deeper sleep modes, this will contribute significantly to

the total current consumption. Refer to “Interrupts” on page 43 for details on how to con-

figure the Watchdog Timer.

When entering a sleep mode, all port pins should be configured to use minimum power.

The most important is then to ensure that no pins drive resistive loads. In sleep modes

where the I/O clock (clkI/O) is stopped, the input buffers of the device will be disabled.

This ensures that no power is consumed by the input logic when not needed. In some

cases, the input logic is needed for detecting wake-up conditions, and it will then be

enabled. Refer to the section “Digital Input Enable and Sleep Modes” on page 49 for

details on which pins are enabled. If the input buffer is enabled and the input signal is

left floating or have an analog signal level close to VCC/2, the input buffer will use exces-

sive power.

For analog input pins, the digital input buffer should be disabled at all times. An analog

signal level close to VCC/2 on an input pin can cause significant current even in active

mode. Digital input buffers can be disabled by writing to the Digital Input Disable Regis-

ters (DIDR). Refer to “Digital Input Disable Register – DIDR” on page 149.

31

2543F–AVR–08/04

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