DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

DSP56311UM/D View Datasheet(PDF) - Motorola => Freescale

Part Name
Description
Manufacturer
DSP56311UM/D
Motorola
Motorola => Freescale Motorola
DSP56311UM/D Datasheet PDF : 100 Pages
First Prev 91 92 93 94 95 96 97 98 99 100
Power Consumption Benchmark
;
control and status bits in SR
M_CP EQU $c00000; mask for CORE-DMA priority bits in SR
M_CA EQU 0
; Carry
M_V EQU 1
; Overflow
M_Z EQU 2
; Zero
M_N EQU 3
; Negative
M_U EQU 4
; Unnormalized
M_E EQU 5
; Extension
M_L EQU 6
; Limit
M_S EQU 7
; Scaling Bit
M_I0 EQU 8
; Interupt Mask Bit 0
M_I1 EQU 9
; Interupt Mask Bit 1
M_S0 EQU 10 ; Scaling Mode Bit 0
M_S1 EQU 11 ; Scaling Mode Bit 1
M_SC EQU 13 ; Sixteen_Bit Compatibility
M_DM EQU 14 ; Double Precision Multiply
M_LF EQU 15 ; DO-Loop Flag
M_FV EQU 16 ; DO-Forever Flag
M_SA EQU 17 ; Sixteen-Bit Arithmetic
M_CE EQU 19 ; Instruction Cache Enable
M_SM EQU 20 ; Arithmetic Saturation
M_RM EQU 21 ; Rounding Mode
M_CP0 EQU 22 ; bit 0 of priority bits in SR
M_CP1 EQU 23 ; bit 1 of priority bits in SR
;
control and status bits in OMR
M_CDP EQU $300 ; mask for CORE-DMA priority bits in OMR
M_MA equ0 ; Operating Mode A
M_MB equ1 ; Operating Mode B
M_MC equ2 ; Operating Mode C
M_MD equ3 ; Operating Mode D
M_EBD EQU 4 ; External Bus Disable bit in OMR
M_SD EQU 6
; Stop Delay
M_MS EQU 7
; Memory Switch bit in OMR
M_CDP0 EQU 8 ; bit 0 of priority bits in OMR
M_CDP1 EQU 9 ; bit 1 of priority bits in OMR
M_BEN EQU 10 ; Burst Enable
M_TAS EQU 11 ; TA Synchronize Select
M_BRT EQU 12 ; Bus Release Timing
M_ATE EQU 15 ; Address Tracing Enable bit in OMR.
M_XYS EQU 16 ; Stack Extension space select bit in OMR.
M_EUN EQU 17 ; Extensed stack UNderflow flag in OMR.
M_EOV EQU 18 ; Extended stack OVerflow flag in OMR.
M_WRP EQU 19 ; Extended WRaP flag in OMR.
M_SEN EQU 20 ; Stack Extension Enable bit in OMR.
;*************************************************************************
;
;
EQUATES for DSP56311 interrupts
;
;
Last update: June 11 1995
;
;*************************************************************************
page 132,55,0,0,0
opt
mex
intequ ident 1,0
if
@DEF(I_VEC)
;leave user definition as is.
else
I_VEC EQU $0
endif
;------------------------------------------------------------------------
; Non-Maskable interrupts
;------------------------------------------------------------------------
I_RESET EQU I_VEC+$00 ; Hardware RESET
I_STACK EQU I_VEC+$02 ; Stack Error
I_ILL EQU I_VEC+$04 ; Illegal Instruction
I_DBG EQU I_VEC+$06 ; Debug Request
A-11

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]