DSP56303UM View Datasheet(PDF) - Freescale Semiconductor

Part Name

Description

Manufacturer

DSP56303UM

24-Bit Digital Signal Processor

Freescale Semiconductor 

;

;

EQUATES for Phase Locked Loop (PLL)

;

;------------------------------------------------------------------------

;

Register Addresses Of PLL

M_PCTL EQU $FFFFFD

; PLL Control Register

;

PLL Control Register

M_MF EQU $FFF

M_DF EQU $7000

M_XTLR EQU 15

M_XTLD EQU 16

M_PSTP EQU 17

M_PEN EQU 18

M_PCOD EQU 19

M_PD EQU $F00000

; Multiplication Factor Bits Mask (MF0-MF11)

; Division Factor Bits Mask (DF0-DF2)

; XTAL Range select bit

; XTAL Disable Bit

; STOP Processing State Bit

; PLL Enable Bit

; PLL Clock Output Disable Bit

; PreDivider Factor Bits Mask (PD0-PD3)

;------------------------------------------------------------------------

;

;

EQUATES for BIU

;

;------------------------------------------------------------------------

;

Register Addresses Of BIU

M_BCR EQU $FFFFFB

M_DCR EQU $FFFFFA

M_AAR0 EQU $FFFFF9

M_AAR1 EQU $FFFFF8

M_AAR2 EQU $FFFFF7

M_AAR3 EQU $FFFFF6

M_IDR EQU $FFFFF5

;

Bus Control Register

M_BA0W EQU $1F

M_BA1W EQU $3E0

M_BA2W EQU $1C00

M_BA3W EQU $E000

M_BDFW EQU $1F0000

M_BBS EQU 21

M_BLH EQU 22

M_BRH EQU 23

;

DRAM Control Register

M_BCW EQU $3

M_BRW EQU $C

M_BPS EQU $300

M_BPLE EQU 11

M_BME EQU 12

M_BRE EQU 13

M_BSTR EQU 14

M_BRF EQU $7F8000

; Bus Control Register

; DRAM Control Register

; Address Attribute Register 0

; Address Attribute Register 1

; Address Attribute Register 2

; Address Attribute Register 3

; ID Register

; Area 0 Wait Control Mask (BA0W0-BA0W4)

; Area 1 Wait Control Mask (BA1W0-BA14)

; Area 2 Wait Control Mask (BA2W0-BA2W2)

; Area 3 Wait Control Mask (BA3W0-BA3W3)

; Default Area Wait Control Mask (BDFW0-BDFW4)

; Bus State

; Bus Lock Hold

; Bus Request Hold

; In Page Wait States Bits Mask (BCW0-BCW1)

; Out Of Page Wait States Bits Mask (BRW0-BRW1)

; DRAM Page Size Bits Mask (BPS0-BPS1)

; Page Logic Enable

; Mastership Enable

; Refresh Enable

; Software Triggered Refresh

; Refresh Rate Bits Mask (BRF0-BRF7)

Freescale Semiconductor

DSP56303 Technical Data, Rev. 11

A-13

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