DSP56303UM View Datasheet(PDF) - Freescale Semiconductor

Part Name

Description

Manufacturer

DSP56303UM

24-Bit Digital Signal Processor

Freescale Semiconductor 

Power Consumption Benchmark

M_BRP EQU 23

; Refresh prescaler

;

Address Attribute Registers

M_BAT EQU $3

M_BAAP EQU 2

M_BPEN EQU 3

M_BXEN EQU 4

M_BYEN EQU 5

M_BAM EQU 6

M_BPAC EQU 7

M_BNC EQU $F00

M_BAC EQU $FFF000

; Ext. Access Type and Pin Def. Bits Mask (BAT0-BAT1)

; Address Attribute Pin Polarity

; Program Space Enable

; X Data Space Enable

; Y Data Space Enable

; Address Muxing

; Packing Enable

; Number of Address Bits to Compare Mask (BNC0-BNC3)

; Address to Compare Bits Mask (BAC0-BAC11)

;

control and status bits in SR

M_CP EQU $c00000

M_CA EQU 0

M_V EQU 1

M_Z EQU 2

M_N EQU 3

M_U EQU 4

M_E EQU 5

M_L EQU 6

M_S EQU 7

M_I0 EQU 8

M_I1 EQU 9

M_S0 EQU 10

M_S1 EQU 11

M_SC EQU 13

M_DM EQU 14

M_LF EQU 15

M_FV EQU 16

M_SA EQU 17

M_CE EQU 19

M_SM EQU 20

M_RM EQU 21

M_CP0 EQU 22

M_CP1 EQU 23

; mask for CORE-DMA priority bits in SR

; Carry

; Overflow

; Zero

; Negative

; Unnormalized

; Extension

; Limit

; Scaling Bit

; Interupt Mask Bit 0

; Interupt Mask Bit 1

; Scaling Mode Bit 0

; Scaling Mode Bit 1

; Sixteen_Bit Compatibility

; Double Precision Multiply

; DO-Loop Flag

; DO-Forever Flag

; Sixteen-Bit Arithmetic

; Instruction Cache Enable

; Arithmetic Saturation

; Rounding Mode

; bit 0 of priority bits in SR

; bit 1 of priority bits in SR

;

control and status bits in OMR

M_CDP EQU $300

; mask for CORE-DMA priority bits in OMR

M_MA equ0

; Operating Mode A

M_MB equ1

; Operating Mode B

M_MC equ2

; Operating Mode C

M_MD equ3

; Operating Mode D

M_EBD EQU 4

; External Bus Disable bit in OMR

M_SD EQU 6

; Stop Delay

M_MS EQU 7

; Memory Switch bit in OMR

M_CDP0 EQU 8

; bit 0 of priority bits in OMR

M_CDP1 EQU 9

; bit 1 of priority bits in OMR

M_BEN EQU 10

; Burst Enable

M_TAS EQU 11

; TA Synchronize Select

M_BRT EQU 12

; Bus Release Timing

M_ATE EQU 15

; Address Tracing Enable bit in OMR.

M_XYS EQU 16

; Stack Extension space select bit in OMR.

M_EUN EQU 17

; Extensed stack UNderflow flag in OMR.

M_EOV EQU 18

; Extended stack OVerflow flag in OMR.

M_WRP EQU 19

; Extended WRaP flag in OMR.

A-14

DSP56303 Technical Data, Rev. 11

Freescale Semiconductor

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