DSP56311 View Datasheet(PDF) - Freescale Semiconductor

Part Name

Description

Manufacturer

DSP56311

24-Bit Digital Signal Processor

Freescale Semiconductor 

Signals/Connections

Table 1-11. Host Interface (Continued)

Signal Name

HDS/HDS

Type

Input

State During

Reset1,2

Signal Description

Ignored Input

Host Data Strobe—When the HI08 is programmed to interface with a single-

data-strobe host bus and the HI function is selected, this signal is the host data

strobe (HDS) Schmitt-trigger input. The polarity of the data strobe is

programmable but is configured as active-low (HDS) following reset.

HWR/HWR

Input

Host Write Data—When the HI08 is programmed to interface with a double-

data-strobe host bus and the HI function is selected, this signal is the host write

data strobe (HWR) Schmitt-trigger input. The polarity of the data strobe is

programmable but is configured as active-low (HWR) following reset.

PB12

HREQ/HREQ

Input or Output

Output

Ignored Input

Port B 12—When the HI08 is configured as GPIO through the HI08 Port Control

Register, this signal is individually programmed as an input or output through the

HI08 Data Direction Register.

Host Request—When the HI08 is programmed to interface with a single host

request host bus and the HI function is selected, this signal is the host request

(HREQ) output. The polarity of the host request is programmable but is

configured as active-low (HREQ) following reset. The host request may be

programmed as a driven or open-drain output.

HTRQ/HTRQ

Output

Transmit Host Request—When the HI08 is programmed to interface with a

double host request host bus and the HI function is selected, this signal is the

transmit host request (HTRQ) output. The polarity of the host request is

programmable but is configured as active-low (HTRQ) following reset. The host

request may be programmed as a driven or open-drain output.

PB14

HACK/HACK

Input or Output

Input

Ignored Input

Port B 14—When the HI08 is configured as GPIO through the HI08 Port Control

Register, this signal is individually programmed as an input or output through the

HI08 Data Direction Register.

Host Acknowledge—When the HI08 is programmed to interface with a single

host request host bus and the HI function is selected, this signal is the host

acknowledge (HACK) Schmitt-trigger input. The polarity of the host

acknowledge is programmable but is configured as active-low (HACK) after

reset.

HRRQ/HRRQ

Output

Receive Host Request—When the HI08 is programmed to interface with a

double host request host bus and the HI function is selected, this signal is the

receive host request (HRRQ) output. The polarity of the host request is

programmable but is configured as active-low (HRRQ) after reset. The host

request may be programmed as a driven or open-drain output.

PB15

Input or Output

Port B 15—When the HI08 is configured as GPIO through the HI08 Port Control

Register, this signal is individually programmed as an input or output through the

HI08 Data Direction Register.

Notes: 1. In the Stop state, the signal maintains the last state as follows:

• If the last state is input, the signal is an ignored input.

• If the last state is output, these lines have weak keepers that maintain the last output state even if the drivers are tri-stated.

2. The Wait processing state does not affect the signal state.

1-10

DSP56311 Technical Data, Rev. 8

Freescale Semiconductor

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