DSP56311 View Datasheet(PDF) - Freescale Semiconductor
Part Name
Description
Manufacturer
DSP56311 Datasheet PDF : 96 Pages
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Specifications
DRAM Type
(tRAC ns)
100
Note: This figure should be used for primary selection. For exact and
detailed timings, see the following tables.
80
70
60
50
40 66 80
100 120
Chip Frequency
(MHz)
4 Wait States
11 Wait States
8 Wait States
15 Wait States
Figure 2-15. DRAM Out-of-Page Wait State Selection Guide
Table 2-11. DRAM Out-of-Page and Refresh Timings, Eleven Wait States1,2
No.
Characteristics
157 Random read or write cycle time
158 RAS assertion to data valid (read)
159 CAS assertion to data valid (read)
160 Column address valid to data valid (read)
161 CAS deassertion to data not valid (read hold time)
162 RAS deassertion to RAS assertion
163 RAS assertion pulse width
164 CAS assertion to RAS deassertion
165 RAS assertion to CAS deassertion
166 CAS assertion pulse width
167 RAS assertion to CAS assertion
168 RAS assertion to column address valid
169 CAS deassertion to RAS assertion
170 CAS deassertion pulse width
171 Row address valid to RAS assertion
Symbol
tRC
tRAC
tCAC
tAA
tOFF
tRP
tRAS
tRSH
tCSH
tCAS
tRCD
tRAD
tCRP
tCP
tASR
Expression3
12 × TC
6.25 × TC −7.0
3.75 × TC −7.0
4.5 × TC −7.0
4.25 × TC −4.0
7.75 × TC −4.0
5.25 × TC −4.0
6.25 × TC −4.0
3.75 × TC −4.0
2.5 × TC ± 4.0
1.75 × TC ± 4.0
5.75 × TC −4.0
4.25 × TC – 6.0
4.25 × TC −4.0
100 MHz
Unit
Min Max
120.0 —
ns
—
55.5 ns
—
30.5 ns
—
38.0 ns
0.0
—
ns
38.5
—
ns
73.5
—
ns
48.5
—
ns
58.5
—
ns
33.5
—
ns
21.0 29.0 ns
13.5 21.5 ns
53.5
—
ns
36.5
—
ns
38.5
—
ns
2-18
DSP56311 Technical Data, Rev. 8
Freescale Semiconductor
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