26
IRQA
A0–A17
25
First IRQA Interrupt Instruction Fetch
Figure 3-7 Recovery from Stop State Using IRQA Interrupt Service
AA0467
A0–A17
DMA Source Address
RD
WR
IRQA, IRQB,
IRQC, IRQD,
NMI
29
First Interrupt Instruction Execution
Figure 3-8 External Memory Access (DMA Source) Timing
3.10 External Memory Expansion Port (Port A)
AA1104
3.10.1
SRAM Timing
Table 3-8 SRAM Read and Write Accesses1
No.
Characteristics
Symbol
Expression2
100 Address valid and AA assertion pulse width
tRC, tWC
(WS + 1) × TC − 4.0
[1 ≤ WS ≤ 3]
(WS + 2) × TC − 4.0
[4 ≤ WS ≤ 7]
(WS + 3) × TC − 4.0
[WS ≥ 8]
Min
Max
Unit
12.0
—
ns
46.0
—
ns
87.0
—
ns
Freescale Semiconductor
DSP56366 Technical Data, Rev. 3.1
3-11