FAN7585 View Datasheet(PDF) - Fairchild Semiconductor
Part Name
Description
Manufacturer
FAN7585 Datasheet PDF : 16 Pages
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5. Power Good Signal Generator
Vref +5V
12 16
Vcc
Ichg
R13
R11
60kΩ
Vref
COMP1
DET
Vref
9
R12
4.7kΩ
COMP2
R14
1.25V
Remote
ON/OFF
PG COMP
COMP3
Q2
0.6V
1.8V
10 TPG
CPG
2.2 uF
R15
1 kΩ
11
PG
Q3
FAN7585
Power Good Signal Generator circuit generates "ON or OFF" signal depending on the status of output voltage to prevent the
malfunctions of following systems like microprocessor, etc. caused by the output instability at power on or off .
At power on, it produces PG "High" signal after some delay time(about 260ms with CTPG=2.2uF) for stabilizing output volt-
age. At power off, it produces PG "Low" signal without delay time by sensing the status of power source for protecting follow-
ing systems. Vcc detection point(Pin9) can be calculated by following equation. Recommended values of R11, R12 are
determined by the following equation.
DET = 1.25V × 1 + RR-----11----12- = 17.2V
The COMP3 creates PG "Low" without delay when +5V output falls to less than 4.0V to prevent some malfunction at transient
status, thus it improves system stability.
When Remote On/Off signal is high, it generates PG "Low" signal without delay. It means that PG becomes "Low" before
main power is grounded.
PG delay time(TPG) is determined by capacitor value(CTPG), threshold voltage of COMP3 and the charging current and its
euqation is as following.
TPG
=
C-----T---P----G-----×-----∆----V--
Ichg
≈
-C----T---P----G-----×-----V----t--h--
Ichg
=
2----.-2----u----F-----×-----1---.--8----V--
15uA
≈
260msec
Considering the lightning surge and noise, there are two types of protections. One is a few time delay between TPG and PG for
safe operation and another is some noise margin of Pin10.
Noise_Margin_of_TPG = VPin10(max)- Vth(L) = 2.9V - 0.6V = 2.3V
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