HT1382 View Datasheet(PDF) - Holtek Semiconductor
Part Name
Description
Manufacturer
HT1382 Datasheet PDF : 29 Pages
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HT1382
I2C/3-Wire Real Time Clock
I2C Serial Interface
The HT1382 includes an I2C serial interface. The I2C bus is used for bidirectional, two-line
communication between multiple I2C devices. The two lines of the interface are the serial data line
(SDA) and the serial clock line (SCL).Both lines are connected to the positive supply via a pull-up
resistor externally.
When the bus is free, both lines will be high. The output stages of the devices connected to the bus
must have open-drain or open-collector output types to implement the wired-AND function necessary
for connection. Data transfer is initiated only when the bus is not busy.
Data Validity
The data on the SDA line must be stable during the HIGH period of the clock. The HIGH or LOW state
of the data line can only change when the clock signal on the SCL line is LOW.
SDA
SCL
Data line stable; Change of data
data valid
allowed
START and STOP Conditions
A HIGH to LOW transition on the SDA line while SCL is HIGH defines a START condition. A LOW
to HIGH transition on the SDA line while SCL is HIGH defines a STOP condition. START and STOP
conditions are always generated by the master. The bus is considered to be busy after the START
condition. The bus is considered to be free again a certain time after the STOP condition. The bus stays
busy if a repeated START(Sr) is generated instead of a STOP condition. In this respect, a START(S)
and repeated START(Sr) conditions are functionally identical.
SDA
SDA
SCL
S
START condition
SCL
P
STOP condition
Byte Format
Every byte put on the SDA line must be 8-bits long. The number of bytes that can be transmitted per
transfer is unrestricted. Each byte has to be followed by an acknowledge bit. Data is transferred with
the most significant bit (MSB) first.
SDA
SCL S
or
Sr
12
P
Sr
789
12
3-8
9
P
ACK
ACK
or
Sr
Rev. 1.40
16
May 27, 2011
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