HT1382 View Datasheet(PDF) - Holtek Semiconductor

Part Name

Description

Manufacturer

HT1382

I2C/3-Wire Real Time Clock

Holtek Semiconductor 

HT1382

I2C/3-Wire Real Time Clock

Data Input and Data Out

In writing a data byte, R/W is cleared to ²0² in the Command Byte and is then followed by the

corresponding data register address on the rising edge of the next eight SCLK. Additional SCLK

cycles are ignored. Data inputs are entered starting with bit 0. In reading data from the register, the

R/W is set to ²1² in the Command Byte. The data bits are output on the falling edge of the next eight

SCLK cycles. Note that the first data bit to be transmitted on the first falling edge after the last bit of the

read command byte is written. Additional SCLK cycles re-transmits the data bytes as long as CE

remains at high level. Data outputs are read starting with bit 0.

· Single Byte Transfer

S C LK

CE

0 1 2 3 4 5 6 701 2 3 4 5 67

I/O

R /W A 0 A 1 A 2 A 3 A 4 0 1

C o m m a n d B y te

D a ta I/O

· Burst Mode Transfer

S C LK

CE

012345670

7

I/O

R /W 1 1 1 1 1 0 1

C o m m a n d B y te

D a ta B y te 0

0

7

D a ta B y te 1 5

Rev. 1.40

19

May 27, 2011

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