LC75864W View Datasheet(PDF) - SANYO -> Panasonic
Part Name
Description
Manufacturer
LC75864W Datasheet PDF : 26 Pages
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Serial Data Output
1. When CL is stopped at the low level
LC75864E, 75864W
CE
CL
DI
11000010
B0 B1 B2 B3 A0 A1 A2 A3
DO
Note: B0 to B3, A0 to A3 ... CCB address
2. When CL is stopped at the high level
X KD1 KD2
KD27 KD28 KD29 KD30 SA
Output data
X: don’t care
CE
CL
DI
1100001
B0 B1 B2 B3 A0 A1 A2
DO
Note: B0 to B3, A0 to A3 ... CCB address
0
A3
X KD1 KD2 KD3
KD28 KD29 KD30 SA X
Output data
X: don’t care
• CCB address...............43H
• KD1 to KD30 .............Key data
• SA...............................Sleep acknowledge data
Note: If a key data read operation is executed when DO is high, the read key data (KD1 to KD30) and sleep
acknowledge data (SA) will be invalid.
Output Data
1. KD1 to KD30: Key data
When a key matrix of up to 30 keys is formed from the KS1 to KS6 output pins and the KI1 to KI5 input pins and
one of those keys is pressed, the key output data corresponding to that key will be set to 1. The table shows the
relationship between those pins and the key data bits.
KS1/S23
KS2/S24
KS3
KS4
KS5
KS6
KI1
KD1
KD6
KD11
KD16
KD21
KD26
KI2
KD2
KD7
KD12
KD17
KD22
KD27
KI3
KD3
KD8
KD13
KD18
KD23
KD28
KI4
KD4
KD9
KD14
KD19
KD24
KD29
KI5
KD5
KD10
KD15
KD20
KD25
KD30
When the KS1/S23 and KS2/S24 output pins are selected to be segment outputs by control data bits K0 and K1 and a
key matrix of up to 20 keys is formed using the KS3 to KS6 output pins and the KI1 to KI5 input pins, the KD1 to
KD10 key data bits will be set to 0.
2. SA: Sleep acknowledge data
This output data bit is set to the state when the key was pressed. Also, while DO will be low in this case, if serial data
is input and the mode is set (to normal or sleep mode) during this period, that mode will be set. SA will be 1 in sleep
mode and 0 in normal mode.
No. 6860-11/26
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