LP1071 View Datasheet(PDF) - Freescale Semiconductor

Part Name

Description

Manufacturer

LP1071

802.11a/b/g Baseband System Solution

Freescale Semiconductor 

Pinout and Footprint

Chip

Boundary

PLL_BYPAS

S

PLL_BYPASS_CLK

TCXO_BYPASS

TCXO_BYPASS_CLK

TCXO 40 MHz

FAST_CLK_PWR

XTAL_BYPASS

XTAL_BYPASS_CLK

XTAL 32 kHz

PLL

40 MHz

88 MHz

Clock

Control

Cuircuits

44 MHz

20 MHz

22 MHz

ARM

AFE

32 kHz

Figure 3. LP1071 Clocks

5.1 System Clock

The LP1071 is clocked using an external crystal oscillator (XO) or a temperature compensated crystal

oscillator (TCXO) running at 40MHz with a frequency resolution of ± 20 ppm or better.

5.2 PLL Block

PLL Bypass

5.3 Low Frequency Clock

The LP1071 uses a low power 32 kHz crystal oscillator to maintain the timing during sleep.

6 Pinout and Footprint

6.1 Pinout

See Table 9 for the pin description.

Table 9. Pin Description

Pad Name

Pad Type Direction

Description

Pin

Power and Ground Pads

VDD_IO

pvdd2dgz

N/A 3.3 V I/O power pad (22 mA per pad max current)

K1

LP1071 Advance Information, Rev. 0.5

16

Freescale Semiconductor

PRELIMINARY

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