M29W128 View Datasheet(PDF) - Numonyx -> Micron
Part Name
Description
Manufacturer
M29W128 Datasheet PDF : 78 Pages
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M29W128FH, M29W128FL
Command interface
5.1.4
5.1.5
See Appendix B, Table 29, Table 30, Table 31, Table 32, Table 33 and Table 34 for details on
the information contained in the Common Flash Interface (CFI) memory area.
Chip Erase command
The Chip Erase command can be used to erase the entire chip. Six Bus Write operations
are required to issue the Chip Erase Command and start the Program/Erase Controller.
If any blocks are protected, then these are ignored and all the other blocks are erased. If all
of the blocks are protected the Chip Erase operation appears to start but will terminate
within about 100µs, leaving the data unchanged. No error condition is given when protected
blocks are ignored.
During the erase operation the memory will ignore all commands, including the Erase
Suspend command. It is not possible to issue any command to abort the operation. Typical
chip erase times are given in Table 15. All Bus Read operations during the Chip Erase
operation will output the Status Register on the Data Inputs/Outputs. See the section on the
Status Register for more details.
After the Chip Erase operation has completed the memory will return to the Read mode,
unless an error has occurred. When an error occurs the memory will continue to output the
Status Register. A Read/Reset command must be issued to reset the error condition and
return to Read mode.
The Chip Erase Command sets all of the bits in unprotected blocks of the memory to ’1’. All
previous data is lost.
Block Erase command
The Block Erase command can be used to erase a list of one or more blocks. It sets all of
the bits in the unprotected selected blocks to ’1’. All previous data in the selected blocks is
lost.
Six Bus Write operations are required to select the first block in the list. Each additional
block in the list can be selected by repeating the sixth Bus Write operation using the address
of the additional block. The Block Erase operation starts the Program/Erase Controller after
a time-out period of 50µs after the last Bus Write operation. Once the Program/Erase
Controller starts it is not possible to select any more blocks. Each additional block must
therefore be selected within 50µs of the last block. The 50µs timer restarts when an
additional block is selected. After the sixth Bus Write operation, a Bus Read operation
outputs the Status Register. See Section 6: Status register for details on how to identify if
the Program/Erase Controller has started the Block Erase operation.
After the Block Erase operation has completed, the memory returns to the Read mode,
unless an error has occurred. When an error occurs, Bus Read operations will continue to
output the Status Register. A Read/Reset command must be issued to reset the error
condition and return to Read mode.
If any selected blocks are protected then these are ignored and all the other selected blocks
are erased. If all of the selected blocks are protected the Block Erase operation appears to
start but will terminate within about 100µs, leaving the data unchanged. No error condition is
given when protected blocks are ignored.
During the Block Erase operation the memory will ignore all commands except the Erase
Suspend command and the Read/Reset command which is only accepted during the 50µs
time-out period. Typical block erase times are given in Table 15.
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