SDRAM (Rev.1.01)
Single Data Rate
July '01
MITSUBISHI LSIs
M2V56S20/ 30/ 40 AKT -5, -6, -7
256M Synchronous DRAM
[ Write with Auto-Precharge Interrupted by Write / Read to another Bank ]
Burst write with auto-precharge can be interrupted by write or read to another bank. Next ACT
comand can be issued after (BL+tWR-1+tRP) from the WRITEA. Auto-precharge interruption by a
command to the same bank is inhibited.
WRITEA interrupted by WRITE to another bank (BL=4)
CLK
Command
Write
Write
BL
A0-9,11-12
Ya
Yb
tWR
A10
1
0
ACT
tRP
Xa
Xa
BA0-1
00
10
00
DQ
Da0 Da1 Db0 Db1 Db2 Db3
auto-precharge interrupted
activate
WRITEA interrupted by READ to another bank (CL=2, BL=4)
CLK
Command
A0-9,11-12
A10
Write
Ya
1
Read
BL
Yb
0
tWR
ACT
tRP
Xa
Xa
BA0-1
00
10
00
DQ
Da0 Da1
Qb0 Qb1 Qb2 Qb3
auto-precharge interrupted
activate
MITSUBISHI ELECTRIC
23