56F8356 View Datasheet(PDF) - Motorola => Freescale
Part Name
Description
Manufacturer
56F8356 Datasheet PDF : 160 Pages
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Freescale Semiconductor, Inc.
2.2 56F8356 Signal Pins
After reset, each pin is configured for its primary function (listed first). Any alternate functionality
must be programmed.
If the “State During Reset” lists more than one state for a pin, the first state is the actual reset state.
Other states show the reset condition of the alternate function, which you get if the alternate pin
function is selected without changing the configuration of the alternate peripheral. For example,
the A8/GPIOA0 pin shows that it is tri-stated during reset. If the GPIOA_PER is changed to select
the GPIO function of the pin, it will become an input if no other registers are changed.
Table 2-2 56F8356 Signal and Package Information for the 144-Pin LQFP
Signal Name Pin No. Type
VDD_IO
VDD_IO
VDD_IO
VDD_IO
VDD_IO
VDD_IO
VDD_IO
VDDA_ADC
1
Supply
16
31
38
66
84
119
102
Supply
VDDA_OSC_PLL
80
Supply
VSS
VSS
VSS
VSS
VSS
VSSA_ADC
OCR_DIS
27
Supply
37
63
69
144
103
Supply
79
Input
State
During
Reset
Signal Description
I/O Power — This pin supplies 3.3V power to the chip I/O
interface.
ADC Power — This pin supplies 3.3V power to the ADC
modules. It must be connected to a clean analog power
supply.
Oscillator and PLL Power — This pin supplies 3.3V
power to the OSC and to the internal regulator that in turn
supplies the Phase Locked Loop. It must be connected to
a clean analog power supply.
VSS — These pins provide ground for chip logic and I/O
drivers.
Input
ADC Analog Ground — This pin supplies an analog
ground to the ADC modules.
On-Chip Regulator Disable —
Tie this pin to VSS to enable the on-chip regulator
Tie this pin to VDD to disable the on-chip regulator
This pin is intended to be a static DC signal from
power-up to shut down. Do not try to toggle this pin
for power savings during operation.
14
56F8356 Technical Data
For More Information On This Product,
Preliminary
Go to: www.freescale.com
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