MC68360 View Datasheet(PDF) - Motorola => Freescale

Part Name

Description

Manufacturer

MC68360

QUad Integrated Communications Controller User’s Manual

Motorola => Freescale 

Table of Contents

Paragraph

Number

7.3

7.3.1

7.3.2

7.4

7.4.1

7.4.2

7.4.3

7.4.4

7.4.5

7.4.6

7.4.7

7.4.8

7.4.9

7.4.10

7.5

7.5.1

7.5.2

7.5.2.1

7.5.2.2

7.5.2.3

7.5.2.4

7.5.2.5

7.5.2.6

7.5.2.7

7.5.3

7.6

7.6.1

7.6.2

7.6.2.1

7.6.2.2

7.6.2.3

7.6.2.4

7.6.2.5

7.6.2.6

7.6.2.7

7.6.2.8

7.6.2.9

7.6.3

7.6.3.1

7.6.3.2

7.6.4

7.6.4.1

7.6.4.2

7.6.4.2.1

7.6.4.2.2

Title

Page

Number

Dual-Port RAM.........................................................................................7-8

Buffer Descriptors ..................................................................................7-10

Parameter RAM .....................................................................................7-10

RISC Timer Tables ................................................................................7-11

RISC Timer Table Parameter RAM .......................................................7-12

RISC Timer Table Entries ......................................................................7-14

RISC Timer Event Register (RTER) ......................................................7-14

RISC Timer Mask Register (RTMR) ......................................................7-14

SET TIMER Command ..........................................................................7-14

RISC Timer Initialization Sequence .......................................................7-14

RISC Timer Initialization Example .........................................................7-15

RISC Timer Interrupt Handling..............................................................7-16

RISC Timer Table Algorithm .................................................................7-16

RISC Timer Table Application: Track the RISC Loading .......................7-16

Timers ...................................................................................................7-17

Timer Key Features ...............................................................................7-17

General-Purpose Timer Units ...............................................................7-18

Cascaded Mode.....................................................................................7-19

Timer Global Configuration Register (TGCR) ........................................7-20

Timer Mode Register (TMR1, TMR2, TMR3, TMR4).............................7-21

Timer Reference Registers (TRR1, TRR2, TRR3, TRR4) .....................7-22

Timer Capture Registers (TCR1, TCR2, TCR3, TCR4).........................7-22

Timer Counter (TCN1, TCN2, TCN3, TCN4) .........................................7-22

Timer Event Registers (TER1, TER2, TER3, TER4) .............................7-22

Timer Examples .....................................................................................7-23

IDMA Channels......................................................................................7-24

IDMA Key Features;..............................................................................7-25

IDMA Registers.....................................................................................7-26

IDMA Channel Configuration Register (ICCR).......................................7-26

Channel Mode Register (CMR)..............................................................7-28

Source Address Pointer Register (SAPR) .............................................7-30

Destination Address Pointer Register (DAPR).......................................7-31

Function Code Register (FCR) ..............................................................7-31

Byte Count Register (BCR)....................................................................7-31

Channel Status Register (CSR) .............................................................7-32

Channel Mask Register (CMAR)............................................................7-33

Data Holding Register (DHR).................................................................7-33

Interface Signals ...................................................................................7-33

DREQ and DACK...................................................................................7-33

DONEx ...................................................................................................7-33

IDMA Operation ....................................................................................7-34

Single Buffer ..........................................................................................7-34

Auto Buffer and Buffer Chaining ............................................................7-34

IDMA Parameter RAM ...........................................................................7-35

IDMA Buffer Descriptors (BDs) ..............................................................7-36

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MC68360 USER’S MANUAL

MOTOROLA

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