MC68360 View Datasheet(PDF) - Motorola => Freescale

Part Name

Description

Manufacturer

MC68360

QUad Integrated Communications Controller User’s Manual

Motorola => Freescale 

Table of Contents

Paragraph

Number

Title

Page

Number

7.10.20.9 Transmitting and Receiving the Synchronization Sequence ............... 7-208

7.10.20.10 BISYNC Error-Handling PROCEDURE............................................... 7-209

7.10.20.10.1 Transmission Errors ............................................................................ 7-209

7.10.20.10.2 Reception Errors ................................................................................. 7-209

7.10.20.11 BISYNC Mode Register (PSMR)......................................................... 7-209

7.10.20.12 BISYNC Receive Buffer Descriptor (Rx BD) ....................................... 7-211

7.10.20.13 BISYNC Transmit Buffer Descriptor (Tx BD)....................................... 7-213

7.10.20.14 BISYNC Event Register (SCCE) ......................................................... 7-216

7.10.20.15 BISYNC Mask Register (SCCM) ......................................................... 7-217

7.10.20.16 SCC Status Register (SCCS).............................................................. 7-217

7.10.20.17 Programming the BISYNC Controller.................................................. 7-217

7.10.20.18 SCC BISYNC Example ....................................................................... 7-218

7.10.21

Transparent Controller ........................................................................ 7-220

7.10.21.1 Transparent Controller Features ......................................................... 7-221

7.10.21.2 Transparent Channel Frame Transmission Processing ...................... 7-221

7.10.21.3 Transparent Channel Frame Reception Processing ........................... 7-222

7.10.21.4 Achieving Synchronization in Transparent Mode ................................ 7-223

7.10.21.4.1 In-Line Synchronization Pattern .......................................................... 7-223

7.10.21.4.2 Transparent Synchronization Example ............................................... 7-224

7.10.21.5 Transparent Memory Map ................................................................... 7-225

7.10.21.6 Transparent Command Set ................................................................. 7-226

7.10.21.6.1 Transmit Commands ........................................................................... 7-226

7.10.21.6.2 Receive Commands ............................................................................ 7-227

7.10.21.7 Transparent Error-Handling Procedure ............................................... 7-227

7.10.21.7.1 Transmission Errors ............................................................................ 7-227

7.10.21.7.2 Reception Errors ................................................................................. 7-228

7.10.21.8 Transparent Mode Register (PSMR)................................................... 7-228

7.10.21.9 Transparent Receive Buffer Descriptor (Rx BD) ................................. 7-228

7.10.21.10 Transparent Transmit Buffer Descriptor (Tx BD)................................. 7-230

7.10.21.11 Transparent Event Register (SCCE) ................................................... 7-232

7.10.21.12 Transparent Mask Register (SCCM) ................................................... 7-233

7.10.21.13 SCC Status Register (SCCS).............................................................. 7-233

7.10.21.14 SCC Transparent Example ................................................................. 7-233

7.10.22

RAM Microcodes ................................................................................. 7-235

7.10.23

Ethernet Controller .............................................................................. 7-235

7.10.23.1 Ethernet On QUICC—MC68EN360 .................................................... 7-236

7.10.23.2 Ethernet Key Features ........................................................................ 7-237

7.10.23.3 Learning Ethernet on the QUICC ........................................................ 7-238

7.10.23.4 Connecting QUICC to Ethernet ........................................................... 7-239

7.10.23.5 Ethernet Channel Frame Transmission............................................... 7-241

7.10.23.6 Ethernet Channel Frame Reception.................................................... 7-242

7.10.23.7 CAM Interface ..................................................................................... 7-243

7.10.23.8 Ethernet Memory Map......................................................................... 7-246

7.10.23.9 Ethernet Programming Model ............................................................. 7-250

7.10.23.10 Ethernet Command Set....................................................................... 7-250

MOTOROLA

MC68360 USER’S MANUAL

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