ML6652 View Datasheet(PDF) - Micro Linear Corporation

Part Name

Description

Manufacturer

ML6652

10/100Mbps Ethernet Fiber and Copper Media Converter with Auto-Negotiation

Micro Linear Corporation 

ML6652

PIN DESCRIPTIONS (continued)

Pin No. Signal Name

I/O

Description

BACKUP LINK FUNCTION

40 BCKPLINK

I/O

LED STATUS

41

TPINSPD

O

PECL/LVPECL Compatible Interface Mode:

This input pin is connected to the Signal Detect (SD) output of a fiber optic

PMD. The voltage level at this pin is compared to the voltage level at pin

SDTH to determine the logic value. If it is lower than the input at FOINP/

FOINN is rejected. If it is higher than the input at FOINP/FOINN is passed to

the internal circuits.

INPUT MODE:

At power up, pin 40 (BCKPLINK) is read and the BCKPDIS register <28.1> is set

appropriately. A high (VCC) at power up causes Register 28, Bit 1 (BCKPDIS)

to be set high (1) disabling the Back-up link function. BCKPDIS can

subsequently be over written by the management interface at any time.

Note: This pin is typically read a few microseconds after power-up, if it is tied

to supplies that do not track the ML6652 power, improper results may occur.

For BCKPLINK, use VCCD (pin 19) as the pull up point, do not add decoupling

capacitors to Pin 40 (without thoroughly understanding your PCB layout power

up dynamics the safest course is to make short connections and do not add

decoupling capacitors to this pin).

OUTPUT MODE:

After power-up, BCKPLINK is used as an output. It is Active high to enable a

secondary fiber link via a second ML6652 device (see Functional Description,

Backup Link Mode in this data sheet for details).

Use this function in forced 100Mbps mode, non loopback only

This output goes high to indicate that a 100Mbps signal is present at the TPINP/

TPINN interface, and it goes low to indicate that a 10Mbps signal is present at

the TPINP/TPINN interface. The signal can be idle or packets. This pin is set to

high impedance otherwise.

42

FOINSPD

O

This output goes high to indicate that a 100Mbps signal is present at the

FOINP/FOINN interface, and it goes low to indicate that a 10Mbps signal is

present at the FOINP/FOINN interface. The signal can be idle or packets. This

pin is set to high impedance otherwise.

43

TPANDT

O

When TPINSPD is in the high impedance state, no 10 or 100Mbps signal at

TPINP/TPINN, the TPANDT LED pulls low while receiving Auto-Negotiation

signal at the TPINP/TPINN interface. When TPINSPD is not in the high

impedance state, the TPANDT pin pulls low to indicate that a data packet is

being detected at the TPINP/TPINN interface. When a data packet is indicated,

the pulse width at TPANDT is stretched to a minimum of 1.3 to 2.7ms to

improve visibility. In any other case this pin is in high impedance state.

11

January 2004

Final Datasheet

DS6652-F-02

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