MPC8540(2004) View Datasheet(PDF) - Freescale Semiconductor

Part Name

Description

Manufacturer

MPC8540
(Rev.:2004)

PowerQUICC III™ Integrated Host Processor Reference Manual

Freescale Semiconductor 

Paragraph

Number

7.10.2.1

7.10.2.2

Contents

Title

Page

Number

ECC Errors............................................................................................................. 7-35

Tag Parity Errors.................................................................................................... 7-36

Part III

Memory and I/O Interfaces

8.1

8.1.1

8.1.2

8.2

8.2.1

8.2.1.1

8.2.1.2

8.2.1.3

8.2.1.4

8.2.1.5

8.2.1.6

8.3

8.3.1

8.3.2

8.3.3

8.3.4

8.3.5

8.4

9.1

9.2

9.2.1

9.3

9.3.1

9.3.2

9.3.2.1

9.3.2.2

9.3.2.3

Chapter 8

e500 Coherency Module

Introduction...................................................................................................................... 8-1

Overview...................................................................................................................... 8-1

Features........................................................................................................................ 8-2

Memory Map/Register Definition ................................................................................... 8-2

Register Descriptions................................................................................................... 8-3

ECM CCB Address Configuration Register (EEBACR) ........................................ 8-3

ECM CCB Port Configuration Register (EEBPCR) ............................................... 8-4

ECM Error Detect Register (EEDR) ....................................................................... 8-5

ECM Error Enable Register (EEER) ....................................................................... 8-6

ECM Error Attributes Capture Register (EEATR) .................................................. 8-7

ECM Error Address Capture Register (EEADR) .................................................... 8-8

Functional Description..................................................................................................... 8-9

I/O Arbiter.................................................................................................................... 8-9

CCB Arbiter................................................................................................................. 8-9

Transaction Queue ....................................................................................................... 8-9

Global Data Multiplexor............................................................................................ 8-10

CCB Interface ............................................................................................................ 8-10

Initialization/Application Information ........................................................................... 8-10

Chapter 9

DDR Memory Controller

Introduction...................................................................................................................... 9-1

Features ............................................................................................................................ 9-2

Modes of Operation ..................................................................................................... 9-3

External Signal Descriptions ........................................................................................... 9-3

Signals Overview......................................................................................................... 9-3

Detailed Signal Descriptions ....................................................................................... 9-5

Memory Interface Signals........................................................................................ 9-5

Clock Interface Signals............................................................................................ 9-8

Debug Signals.......................................................................................................... 9-8

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

Freescale Semiconductor

xiii

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