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NJU6538 View Datasheet(PDF) - Japan Radio Corporation

Part Name
Description
Manufacturer
NJU6538 Datasheet PDF : 27 Pages
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NJU6538
Timing chart of key data reading out operation
Key input
SO
Key ON
t1
t2 t1
Key OFF
t2 t1
CE
SCL
Interrupt
t3
t3
t3
t3
Decision
Key OFF
Key ON
Key OFF
t1: Key scan time
t2: Key data read time
t3: Interrupt cycle
*: t3 > t1 + t2
(6) Reset circuit initializes
Reset circuit initializes the NJU6538 at Power ON and OFF. It generates reset signal to initialize the
system at low VDD less than power down detection voltage (2.0V typical).
(6-1) Initial status in reset
1, Stop the oscillation circuit
2, Display Off (Available Serial data transmission)
3, Disable Key scan function
4, Filled “L” data in all of key data buffer
(6-2) The status of output port terminals in Reset
Output terminals
Reset status
SEG1 to SEG65
L
COM1 to COM10
L
Po0 to Po2
L
Po3/S0
L *1
S1 to S4
H
SIO
H *2
*1 This terminal operates as segment driver and outputs “L”.
*2 This terminal consisted of Open-drain output type circuit requires external pull-up resister connect ting to
external power source for MPU. I f key data read is executed in power on reset, the read data is fixed as “H”.
The reset circuit initializes the LSI to the following status by using of the input 10µs(min.) or over “L”
level signal into the RESb terminal. The LSI will return to normal operation after about 1.0µs(max.)
from the rising edge of the rest signal. The “Reset” instruction can’t be substituted for the reset
operation by using of the RESb terminal. It executes above-mentioned only 7 to 13 items.
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Ver.2003-05-09

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