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PIC16F872-I View Datasheet(PDF) - Microchip Technology

Part Name
Description
Manufacturer
PIC16F872-I
Microchip
Microchip Technology Microchip
PIC16F872-I Datasheet PDF : 160 Pages
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PIC16F872
2.2.2.4 PIE1 REGISTER
The PIE1 register contains the individual enable bits for
the peripheral interrupts.
REGISTER 2-4: PIE1 REGISTER (ADDRESS 8Ch)
Note: Bit PEIE (INTCON<6>) must be set to
enable any peripheral interrupt.
R/W-0
bit7
R/W-0
ADIE
R/W-0
R/W-0
R/W-0
SSPIE
R/W-0
CCP1IE
R/W-0 R/W-0
TMR2IE TMR1IE
bit0
bit 7: Reserved: Always maintain this bit clear
bit 6:
ADIE: A/D Converter Interrupt Enable bit
1 = Enables the A/D converter interrupt
0 = Disables the A/D converter interrupt
bit 5-4: Reserved: Always maintain this bit clear
bit 3:
SSPIE: Synchronous Serial Port Interrupt Enable bit
1 = Enables the SSP interrupt
0 = Disables the SSP interrupt
bit 2:
CCP1IE: CCP1 Interrupt Enable bit
1 = Enables the CCP1 interrupt
0 = Disables the CCP1 interrupt
bit 1:
TMR2IE: TMR2 to PR2 Match Interrupt Enable bit
1 = Enables the TMR2 to PR2 match interrupt
0 = Disables the TMR2 to PR2 match interrupt
bit 0:
TMR1IE: TMR1 Overflow Interrupt Enable bit
1 = Enables the TMR1 overflow interrupt
0 = Disables the TMR1 overflow interrupt
R = Readable bit
W = Writable bit
U = Unimplemented bit,
read as ‘0’
- n= Value at POR reset
© 1999 Microchip Technology Inc.
Preliminary
DS30221A-page 15

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