PIC16F872-I View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC16F872-I

28-Pin, 8-Bit CMOS FLASH Microcontroller

Microchip Technology 

PIC16F872

2.2.2.7 PIR2 REGISTER

The PIR2 register contains the flag bits for the SSP bus

collision interrupt and the EEPROM write operation

interrupt.

.

Note:

Interrupt flag bits get set when an interrupt

condition occurs, regardless of the state of

its corresponding enable bit or the global

enable bit, GIE (INTCON<7>). User soft-

ware should ensure the appropriate inter-

rupt flag bits are clear prior to enabling an

interrupt.

REGISTER 2-7: PIR2 REGISTER (ADDRESS 0Dh)

U-0 R/W-0 U-0 R/W-0 R/W-0 U-0

U-0 R/W-0

—

—

—

EEIF BCLIF

—

bit7

—

—

R = Readable bit

bit0 W = Writable bit

U = Unimplemented bit,

read as ‘0’

- n= Value at POR reset

bit 7: Unimplemented: Read as '0'

bit 6: Reserved: Always maintain this bit clear

bit 5: Unimplemented: Read as '0'

bit 4:

EEIF: EEPROM Write Operation Interrupt Flag bit

1 = The write operation completed (must be cleared in software)

0 = The write operation is not complete or has not been started

bit 3:

BCLIF: Bus Collision Interrupt Flag

1 = A bus collision has occurred in the SSP, when configured for I2C master mode

0 = No bus collision has occurred

bit 2-1: Unimplemented: Read as '0'

bit 0: Reserved: Always maintain this bit clear

DS30221A-page 18

Preliminary

© 1999 Microchip Technology Inc.

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