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QT1106 View Datasheet(PDF) - Quantum Research Group

Part Name
Description
Manufacturer
QT1106
Quantum
Quantum Research Group Quantum
QT1106 Datasheet PDF : 20 Pages
First Prev 11 12 13 14 15 16 17 18 19 20
W: The state of the wheel/rotor. A ‘1’ means the wheel/slider
is confirmed as being touched.
Position: The position of touch on the wheel/slider. If the
wheel/slider is not being touched, the position will be the
position of the last touch.
4 Operating Modes
4.1 Introduction
Four basic operating modes are possible: Free Run, LP (Low
Power), Sync and Sleep. Sleep is a special case of LP
mode, where the sleep time is infinite. Sync is a special case
of LP mode which acts as a noise filter over successive /SS
pulses rather than temporarily operating as in Free Run
mode.
4.2 Free Run Mode
In this mode the device operates continuously with short
intervals between burst groups; there are three bursts, one
burst for each electrode group. Between burst sets, DRDY
goes high for 450µs to allow SPI communications.
In this mode, the acquisition bursts are unsynchronized,
making this mode unsuitable if synchronization to mains
frequency is needed.
4.3 LP Mode
LP mode is designed to allow low power operation while still
retaining basic operation but at a slower speed. This mode is
useful for devices that must use the touch keys to wake up a
product, yet be in a low power mode.
Several LP timings allow the user to trade power versus
response time: the slower the response time, the lower the
power consumed.
In LP mode, the device spends most of the time sleeping
between bursts; it wakes itself periodically to do a set of
three acquisition bursts, then goes back to sleep. If a touch
is detected, the device operates as in Free Run mode and
attempts to perform the DI (detect integrator noise filter)
function to completion; if the DI filter fails to confirm a
detection the device goes back to sleep and resumes LP
mode. During the DI function the LPS bit will be cleared.
If a key is found to be in detection the CHANGE pin will go
high and the part will remain in Free Run mode. To go back
into LP mode the host has to request LP mode again.
CHANGE Pin in LP Mode: During the sleep portion of LP
mode, CHANGE is held low.
If however a change of key state is confirmed, CHANGE
goes high and the part runs from then on in Free Run mode
until the host reads the key state and puts the device back
into LP mode or some other mode.
MISO in LP Mode: During the sleep portion of LP mode,
MISO floats.
DRDY during LP Mode: DRDY remains high while the
QT1106 is sleeping, to indicate to the host that SPI
communications are possible . In LP mode, the host should
wake the QT1106 using a pulse on /SS before transferring
data over SPI (see below). During an actual acquire burst,
DRDY is held low.
/SS Wake Pulse in LP Mode: In LP mode the host should
wake the device from sleep using a low pulse on /SS. The
pulse should be at least 1 25µs wide.
Within 100µs of the end of the /SS pulse, the QT1106 will
take DRDY low for at least 40µs to indicate that it has
received the /SS wake pulse.
Following the >45µs DRDY low pulse, the host can
communicate normally with the device (see ‘Command
During LP Mode’ on Page 12).
If the LPB bit (page 9) is set, the device will then perform a
set of acquire bursts during which DRDY will be low.
Provided no key is detected as being touched during that
burst, the QT1106 will go back to sleep, leaving DRDY high.
The CHANGE pin can go high if a key state changes during
the burst(s) following the wake pulse.
If a key is confirmed as touched, the device will transition to
Free Run mode automatically.
Figure 4.1 LP Mode SPI Operation with LPB=1
No SPI Communication
Acquire Bursts
>40us
<150us
DRDY from QT
~23ms
>450us
<100us
<240us
<20us
(grace period)
/SS from host
>125us
SPI Communication
~23ms
<240us
<470us
/SS timing as left
SCLK from Host
don't care
Host Data Output
(QT1106 Input - MOSI)
don't care
QT Data Output
(QT1106 Out - MISO)
3-state
Lq
don't care
don't care
11
don't care
command bytes
response bytes
don't care
3-state
QT1106-ISG R8I.05/0906

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