MYSON
TECHNOLOGY
MTV212A32
(Rev. 1.2)
Rt1, Rt0= 0,0
= 0,1
= 1,0
= 1,1
STE = 1
=0
= 1,0 → 63.5KHz(horizontal)/60Hz(vertical) output selected.
= 0,1 → 47.6KHz(horizontal) /60Hz(vertical) output selected.
= 0,0 → 31.75KHz(horizontal) /60Hz(vertical) output selected.
→ positive cross-hatch pattern output.
→ negative cross-hatch pattern output.
→ full white pattern output.
→ full black pattern output.
→ enable STOUT output.
→ disable STOUT output.
HVCTR3 (w) : HSYNC clamp pulse control register.
CLPEG = 1 → Clamp pulse follows HSYNC leading edge.
= 0 → Clamp pulse follows HSYNC trailing edge.
CLPPO = 1 → Positive polarity clamp pulse output.
= 0 → Negative polarity clamp pulse output.
CLPW2 : CLPW0 : Pulse width of clamp pulse is
[(CLPW2:CLPW0) + 1] x 0.167 µs for 12MHz X’tal selection.
INTFLG (w) : Interrupt flag. An interrupt event will set its individual flag, and, if the corresponding interrupt
enable bit is set, the 8051 core's INT1 source will be driven by a zero level. Software MUST
clear this register while serve the interrupt routine.
HPRchg= 1 → No action.
= 0 → Clear HSYNC presence change flag.
VPRchg= 1 → No action.
= 0 → Clear VSYNC presence change flag.
HPLchg= 1 → No action.
= 0 → Clear HSYNC polarity change flag.
VPLchg = 1 → No action.
= 0 → Clear VSYNC polarity change flag.
HFchg = 1 → No action.
= 0 → Clear HSYNC frequency change flag.
VFchg = 1 → No action.
= 0 → Clear VSYNC frequency change flag.
Vsync = 1 → No action.
= 0 → Clear VSYNC interrupt flag.
INTFLG (r) : Interrupt flag.
HPRchg= 1 → Indicates a HSYNC presence change.
VPRchg= 1 → Indicates a VSYNC presence change.
HPLchg= 1 → Indicates a HSYNC polarity change.
VPLchg = 1 → Indicates a VSYNC polarity change.
HFchg = 1 → Indicates a HSYNC frequency change or counter overflow.
VFchg = 1 → Indicates a VSYNC frequency change or counter overflow.
Vsync = 1 → Indicates a VSYNC interrupt.
INTEN (w) : Interrupt enable.
EHPR = 1 → Enable HSYNC presence change interrupt.
EVPR = 1 → Enable VSYNC presence change interrupt.
EHPL = 1 → Enable HSYNC polarity change interrupt.
EVPL = 1 → Enable VSYNC polarity change interrupt.
EHF = 1 → Enable HSYNC frequency change / counter overflow interrupt.
EVF = 1 → Enable VSYNC frequency change / counter overflow interrupt.
EVsync = 1 → Enable VSYNC interrupt.
Revision 1.2
- 14 -
2000/07/04