RF2705 View Datasheet(PDF) - RF Micro Devices

Part Name

Description

Manufacturer

RF2705

QUADRATURE DEMODULATOR

RF Micro Devices 

RF2705

Pin

22

23

24

Pkg

Base

Function

I SIG P

I SIG N

MODE B

DIE FLAG

Description

Interface Schematic

In-phase I channel positive baseband input port.

Best performance is achieved when the ISIGP and ISIGN are driven

differentially with a 1.2V common mode DC voltage. The recom-

mended differential drive level (VISIGP-VISIGN) is 1.2VP-P for EDGE,

0.8VP-P W-CDMA modulation and 1.0VP-P for GMSK modulation.

This input should be DC-biased at 1.2V. In sleep mode an internal FET

switch is opened, the input goes high impedance and the modulator is

de-biased.

Phase or amplitude errors between the ISIGP and ISIGN signals will

result in a common-mode signal which may result in an increase in the

even order distortion of the modulation in the output spectrum.

DC offsets between the ISIGP and ISIGN signals will result in

increased carrier leakage. Small DC offsets may be deliberately

applied between the ISIGP/ISIGN and QSIGP/QSIGN inputs to can-

cel out the LO leakage. The optimum corrective DC offsets will change

with mode, frequency and gain control.

Common-mode noise on the ISIGP and ISIGN should be kept low as it

may degrade the noise performance of the modulator.

Phase offsets from quadrature between the I and Q baseband signals

results in degrades sideband suppression.

In-phase I channel negative baseband input port. See pin 22.

VCC2

x1

See pin 22.

Mode control pin. See the Logic Truth table.

CMOS Logic inputs: Logic 0=0V to 0.4V; Logic 1=1.4V to VCC.

Ground for LO section, modular, biasing, variable gain amplifier, and

substrate.

See pin 6.

5-128

Rev A4 041026

Share Link: