SST25VF020B-80-4I-SAE View Datasheet(PDF) - Silicon Storage Technology
Part Name
Description
Manufacturer
SST25VF020B-80-4I-SAE Datasheet PDF : 33 Pages
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Data Sheet
2 Mbit SPI Serial Flash
SST25VF020B
CE#
MODE 3 0
1
2
3
4
5
6
7
8
9 10 11 12 13 14
SCK MODE 0
SI
35
MSB
HIGH IMPEDANCE
SO
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
MSB
Status
Register Out
1417 RDSR1seq.0
FIGURE 17: Read-Status-Register 1 (RDSR1) Sequence
Write-Enable (WREN)
The Write-Enable (WREN) instruction sets the Write-
Enable-Latch bit in the Status Register to 1 allowing Write
operations to occur. The WREN instruction must be exe-
cuted prior to any Write (Program/Erase) operation. The
WREN instruction may also be used to allow execution of
the Write-Status-Register (WRSR) instruction; however,
the Write-Enable-Latch bit in the Status Register will be
cleared upon the rising edge CE# of the WRSR instruction.
CE# must be driven high before the WREN instruction is
executed.
CE#
MODE 3
SCK MODE 0
0 1 2345 6 7
SI
06
MSB
SO
HIGH IMPEDANCE
1417 WREN.0
FIGURE 18: Write Enable (WREN) Sequence
Write-Disable (WRDI)
The Write-Disable (WRDI) instruction resets the Write-
Enable-Latch bit and AAI bit to 0 disabling any new Write
operations from occurring. The WRDI instruction will not
terminate any programming operation in progress. Any pro-
gram operation in progress may continue up to TBP after
executing the WRDI instruction. CE# must be driven high
before the WRDI instruction is executed.
©2010 Silicon Storage Technology, Inc.
18
S71417-02-000
04/10
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