SST25VF020B View Datasheet(PDF) - Silicon Storage Technology
Part Name
Description
Manufacturer
SST25VF020B Datasheet PDF : 33 Pages
| |||
2 Mbit SPI Serial Flash
SST25VF020B
Data Sheet
CE#
MODE 3 0 1 2 3 4 5 6 7
MODE 3 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23
SCK MODE 0
MODE 0
SI
50 or 06
MSB
SO
01
MSB
HIGH IMPEDANCE
STATUS
REGISTER
STATUS
REGISTER 1
76 54 3 2 10 76 54 3 2 10
MSB
MSB
1417 EWSR1.0
FIGURE 21: Enable-Write-Status-Register (EWSR) or
Write-Enable (WREN) and Write-Status-Register (WRSR) Word-Data Input Sequence
The WRSR instruction can either execute a byte-data or a
word-data input. Extra data/clock input, or within byte-/
word-data input, will not be executed. The reason for the
byte support is for backward compatibility to products
where WRSR instruction sequence is followed by only a
byte-data.
JEDEC Read-ID
The JEDEC Read-ID instruction identifies the device as
SST25VF020B and the manufacturer as SST. The device
information can be read from executing the 8-bit command,
9FH. Following the JEDEC Read-ID instruction, the 8-bit
manufacturer’s ID, BFH, is output from the device. After
that, a 16-bit device ID is shifted out on the SO pin. Byte 1,
BFH, identifies the manufacturer as SST. Byte 2, 25H, iden-
tifies the memory type as SPI Serial Flash. Byte 3, 8CH,
identifies the device as SST25VF020B. The instruction
sequence is shown in Figure 22. The JEDEC Read ID
instruction is terminated by a low to high transition on CE#
at any time during data output.
CE#
SCK
MODE 3
MODE 0
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
SI
9F
HIGH IMPEDANCE
SO
BF
MSB
25
MSB
FIGURE 22: JEDEC Read-ID Sequence
TABLE 7: JEDEC Read-ID Data
Device ID
Manufacturer’s ID
Byte1
BFH
Memory Type
Byte 2
25H
Memory Capacity
Byte 3
8CH
T7.0 1417
8C
1417 JEDECID.1
©2010 Silicon Storage Technology, Inc.
21
S71417-02-000
04/10
Share Link: 