STK6005
the VGAHS or CSync signals for the external ADC H-Sync input. And suitable coast and clamp signals are
also generated for external ADC.
5.6 Definition of Input / Output Window
The input capture window is defined by the internal registers: HBP, HDISP, VBP, and VDISP (if SelDE
is set to 0). The timing of inputs are referred to the leading edge of input H-Sync and V-Sync. The
horizontal timing is counted in the number of VCLKs and the vertical timing exists in input display lines.
Input Sampling Area
HBP
HDISP
IHT
Input window diagram
VBP
VDISP
IVT
13
Back to Contents Table