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SAA9750H View Datasheet(PDF) - Philips Electronics

Part Name
Description
Manufacturer
SAA9750H
Philips
Philips Electronics Philips
SAA9750H Datasheet PDF : 24 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
Philips Semiconductors
Camera Digital Signal Processor
(CAMDSP)
Preliminary specification
SAA9750H
handbook, full pagCewCidDth720H
0
SHD
83 (83)
1H
858 (864) clocks
83 (83)
HD
36 (36)
CP2
,,, Y0 to Y7
34 (34)
50 (50)
HSYNC
,,, YDA and CDA
63 (63)
67 (67)
SYNC
104 (104)
,,,,,,, 113 (113)
172 (182)
,,,,,,, 209 (229)
130 (130)
CCD 768H 0
SHD
89 (89)
1H
910 (908) clocks
89 (89)
HD
36 (36)
CP2
,,, Y0 to Y7
,,, HSYNC
,,,,,, YDA and CDA
33 (33)
54 (54)
65 (63)
71 (71)
SYNC
108 (108)
191 (203)
,,,,,,,,,,,,,, 121 (121)
223 (235)
,,,,,,,,,,,,,, 138 (138)
MHA308
Fig.6 SSG timing (continued from Fig.5).
SHD: HD output can be changed by microprocessor to SHD outputs.
HD: For timing of input CDS signal for PPG IC.
HSYNC: For output luminance signal Y7 to Y0 and chrominance signal UV7 to UV0 of CAMDSPs YC processing.
SYNC: Composite SYNC pulse of DACs output.
Output of CSYNC (pin 59): SYNC + 1 clock (see Figs 5 and 6).
1996 Feb 16
12

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