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UPD784936A View Datasheet(PDF) - NEC => Renesas Technology

Part Name
Description
Manufacturer
UPD784936A
NEC
NEC => Renesas Technology NEC
UPD784936A Datasheet PDF : 102 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
µPD784935A,784936A,784937A,784938A
6.2 Non-Port Pins (1/2)
Pin Name
TO0 to TO3
CI
RxD
RxD2
TxD
TxD2
ASCK
ASCK2
SI0
SI1
SI2
SI3
SO0
SO1
SO2
SO3
SCK0
SCK1
SCK2
SCK3
NMI
INTP0
I/O
Output
Input
Input
Output
Input
Input
Output
Input/
output
Input
Alternate Function
P34 to P37
P23/INTP2
P30/SI1
P13/SI2
P31/SO1
P14/SO2
P25/INTP4/SCK1
P12/SCK2
P27
P30/RxD
P13/RxD2
P106
P33
P31/TxD
P14/TxD2
P107
P32
P25/INTP4/ASCK
P12/ASCK2
P105
P20
P21
INTP1
P22
INTP2
P23/CI
INTP3
P24
INTP4
INTP5
AD0 to AD7
A8 to A15
A16 to A19
RD
WR
WAIT
REFRQ
HLDRQ
HLDAK
ASTB
Input/
output
Output
Output
Output
Output
Input
Output
Input
Output
Output
P25/ASCK/SCK1
P26
P40 to P47
P50 to P57
P60 to P63
P64
P65
P66/HLDRQ
P67/HLDAK
P66/WAIT
P67/REFRQ
CLKOUT
Function
Timer output
Count clock input to timer/counter 2
Serial data input (UART0)
Serial data input (UART2)
Serial data output (UART0)
Serial data output (UART2)
Baud rate clock input (UART0)
Baud rate clock input (UART2)
Serial data input (3-wire serial I/O0)
Serial data input (3-wire serial I/O1)
Serial data input (3-wire serial I/O2)
Serial data input (3-wire serial I/O3)
Serial data output (3-wire serial I/O0)
Serial data output (3-wire serial I/O1)
Serial data output (3-wire serial I/O2)
Serial data output (3-wire serial I/O3)
Serial clock input/output (3-wire serial I/O0)
Serial clock input/output (3-wire serial I/O1)
Serial clock input/output (3-wire serial I/O2)
Serial clock input/output (3-wire serial I/O3)
External interrupt requests
Count clock input to timer/counter 1
Capture trigger signal of CR11 or CR12
Count clock input to timer/counter 2
Capture trigger signal of CR22
Count clock input to timer/counter 2
Capture trigger signal of CR21
Count clock input to timer/counter 0
Capture trigger signal of CR02
Conversion start trigger input of A/D converter
Time-division address/data bus (external memory connection)
Higher address bus (external memory connection)
Higher address for address extension (external memory connection)
Read strobe to external memory
Write strobe to external memory
Wait insertion
Refresh pulse output to external pseudo-static memory
Bus hold request input
Bus hold acknowledge output
Latch timing output of time-division address (A0 to A7) (when external
memory is accessed)
16
Data Sheet U13572EJ2V0DS

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