STA304 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STA304

DIGITAL AUDIO PROCESSOR WITH MULTICHANNEL DDX™

STMicroelectronics 

STA304

Figure 7. Powerdown management

EAPD (reg. 26h, bit 15)

DSP

Requests

LR

LFE

SL &

SR

OR

PWDN pin (reg.7EFh, bit0)

(Active Low)

PR5 (reg.26h, bit 13)

LR

reg. 02h bit 15

LFE

reg. 36h bit 15

SR

reg. 38h bit 07

SL

reg. 38h bit 15

EAPD pin (ACTIVE Low)

&

Chip powerdown

&

Internal CK disable

&

In order to avoid any possible pop-noise while switching between the various powerdown modes a particular

masking technique has been adopted to drive the actual controlling signals: as shown in the above figure the 3

powerdown requests will inform the DSP using the related bits in specific registers. After that the DSP performs

a software fade-out of the channels volume and, finally, activates the MUTE flags of the various channels.

The actual controlling lines are the result of a logical AND operation between the relative request signals and

the 4 channel MUTE bits (LR, LFE, SL and SR).

Moreover the external power chip will be turned off (via the EAPD pin) not only as a consequence of an EAPD request,

but also as a consequence of a PR5 or PWDN requests: this solution will prevent any possible noise or glitch.

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