M2S56D20AKP View Datasheet(PDF) - Elpida Memory, Inc
Part Name
Description
Manufacturer
M2S56D20AKP Datasheet PDF : 41 Pages
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DDR SDRAM
E0338M10 (Ver.1.0)
(Previous Rev.1.54E)
Jan. '03 CP(K)
M2S56D20/ 30/ 40ATP
M2S56D20/ 30/ 40AKT
256M Double Data Rate Synchronous DRAM
AVERAGE SUPPLY CURRENT from VDD
(TA=0 to 70oC, VDD = VDDQ = 2.5V + 0.2V, VSS = VSSQ = 0V, Output Open, unless otherwise noted)
Symbol
Parameter/Test Conditions
OPERATING CURRENT: One Bank; Active-Precharge; t RC = t RC MIN;
IDD0 t CK = t CK MIN; DQ, DM and DQS inputs changing twice per clock
cycle; address and control inputs changing once per clock cycle
Organization
ALL
Limits(Max.)
-60
-75A / -75 Unit Notes
100
85
OPERATING CURRENT: One Bank; Active-Read-Precharge;
x4
IDD1 Burst = 2; t RC = t RC MIN; CL = 2.5; t CK = t CK MIN; IOUT= 0mA;
x8
Address and control inputs changing once per clock cycle
x16
IDD2P
PRECHARGE POWER-DOWN STANDBY CURRENT: All banks idle;
power-down mode; CKE <VIL (MAX); t CK = t CK MIN
ALL
110
95
120
100
140
115
10
6
IDLE STANDBY CURRENT: /CS > VIH (MIN); All banks idle;
IDD2F CKE > VIH (MIN); t CK = t CK MIN; Address and other control inputs
changing once per clock cycle
ALL
35
30
IDD3P
ACTIVE POWER-DOWN STANDBY CURRENT: One bank active;
power-down mode; CKE < VIL (MAX); t CK = t CK MIN
ALL
20
ACTIVE STANDBY CURRENT: /CS > VIH (MIN); CKE > VIH (MIN); One
IDD3N
bank; Active-Precharge; t RC = t RAS MAX; t CK = t CK MIN; DQ,DM
and DQS inputs changing twice per clock cycle; address and other
ALL
55
control inputs changing once per clock cycle
OPERATING CURRENT: Burst = 2; Reads; Continuous burst;One bank
x4
180
IDD4R active; Address and control inputs changing once per clock cycle;CL=2.5;
x8
190
t CK = t CK MIN; IOUT = 0 mA
x16
220
OPERATING CURRENT: Burst = 2; Writes; Continuous burst; One bank
x4
180
IDD4W
active; Address and control inputs changing once per clock cycle;
CL=2.5; t CK = t CK MIN;DQ, DM and DQS inputs changing twice per
x8
190
clock cycle
x16
220
IDD5 AUTO REFRESH CURRENT: t RC = t RFC (MIN)
ALL
150
-60/-75A/-75
3
IDD6
SELF REFRESH CURRENT: CKE < 0.2V
-60/-75A/-75 L
2
-60/-75AU/-75 UL
1
x4
270
IDD7
OPERATING CURRENT-Four bank Operation: Four bank are interleaved
with BL=4, refer to the Notes 20
x8
290
x16
330
15
45
mA
140
150
180
130
140
160
140
3
9
2
9,21
1
9,22
215
20
235
20
270
20
AC OPERATING CONDITIONS AND CHARACTERISTICS
(TA=0 to 70oC, VDD = VDDQ = 2.5V + 0.2V, VSS = VSSQ = 0V, Output Open, unless otherwise noted)
Symbol
Parameter / Test Conditions
Limits
Min.
Max.
Unit Notes
VIH(AC) High-Level Input Voltage (AC)
VREF + 0.31
V
VIL(AC) Low-Level Input Voltage (AC)
VREF - 0.31
V
VID(AC) Input Differential Voltage, CLK and /CLK
0.7
VDDQ + 0.6
V
7
VIX(AC) Input Crossing Point Voltage, CLK and /CLK
0.5*VDDQ - 0.2 0.5*VDDQ + 0.2
V
8
IOZ Off-state Output Current /Q floating Vo=0 to VDDQ
-5
5
uA
II Input Current / VIN=0 to VDDQ
-2
2
uA
IOH Output High Current (VOUT = VTT+0.84V)
-16.8
mA
IOL Output High Current (VOUT = VTT-0.84V)
16.8
mA
19
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