SSD1818 View Datasheet(PDF) - Unspecified

Part Name

Description

Manufacturer

SSD1818

LCD Segment / Common Driver with Controller

Unspecified 

4. Bias Ratio Selection circuitry

The bias ratios can be software selected from 1/4, 1/5, 1/6, 1/7, 1/8 and 1/9.

Since there will be slightly different in command pattern for different MUX, please refer to Command

Descriptions section of this data sheet.

5. Self adjust temperature compensation circuitry

This block provides 4 different compensation settings to satisfy various liquid crystal temperature grades

by software control. Default temperature coefficient (TC) setting is TC0.

Graphic Display Data RAM (GDDRAM)

The GDDRAM is a bit mapped static RAM holding the bit pattern to be displayed. The size of the RAM is

104 x 65 = 6760 bits. Table 4 on Page 17 is a description of the GDDRAM address map.

For mechanical flexibility, re-mapping on both Segment and Common outputs can be selected by

software.

For vertical scrolling of the display, an internal register storing display start line can be set to control the

portion of the RAM data to be mapped to the display. Table 4 on Page 17 shows the case in which the

display start line register is set to 38h.

For those GDDRAM out of the display common range, they could still be accessed, for either preparation

of vertical scrolling data or even for the system usage.

SSD1818 Series

Rev 1.2

08/2002

16

SOLOMON

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